1f3d549ddSStephen WarrenTegra SOC USB controllers 2f3d549ddSStephen Warren 3f3d549ddSStephen WarrenThe device node for a USB controller that is part of a Tegra 4f3d549ddSStephen WarrenSOC is as described in the document "Open Firmware Recommended 5f3d549ddSStephen WarrenPractice : Universal Serial Bus" with the following modifications 6f3d549ddSStephen Warrenand additions : 7f3d549ddSStephen Warren 8f3d549ddSStephen WarrenRequired properties : 9d400f209SVenu Byravarasu - compatible : Should be "nvidia,tegra20-ehci". 10d400f209SVenu Byravarasu - nvidia,phy : phandle of the PHY that the controller is connected to. 11d8f64797SStephen Warren - clocks : Must contain one entry, for the module clock. 12d8f64797SStephen Warren See ../clocks/clock-bindings.txt for details. 1307999587SStephen Warren - resets : Must contain an entry for each entry in reset-names. 1407999587SStephen Warren See ../reset/reset.txt for details. 1507999587SStephen Warren - reset-names : Must include the following entries: 1607999587SStephen Warren - usb 17f3d549ddSStephen Warren 18f3d549ddSStephen WarrenOptional properties: 19d400f209SVenu Byravarasu - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 20b4e07478SVenu Byravarasu USB ports, which need reset twice due to hardware issues. 21