1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek USB3 DRD Controller Device Tree Bindings
9
10maintainers:
11  - Chunfeng Yun <chunfeng.yun@mediatek.com>
12
13allOf:
14  - $ref: "usb-drd.yaml"
15
16description: |
17  The DRD controller has a glue layer IPPC (IP Port Control), and its host is
18  based on xHCI.
19
20properties:
21  compatible:
22    items:
23      - enum:
24          - mediatek,mt2712-mtu3
25          - mediatek,mt8173-mtu3
26          - mediatek,mt8183-mtu3
27      - const: mediatek,mtu3
28
29  reg:
30    items:
31      - description: the registers of device MAC
32      - description: the registers of IP Port Control
33
34  reg-names:
35    items:
36      - const: mac
37      - const: ippc
38
39  interrupts:
40    maxItems: 1
41
42  power-domains:
43    description: A phandle to USB power domain node to control USB's MTCMOS
44    maxItems: 1
45
46  clocks:
47    minItems: 1
48    items:
49      - description: Controller clock used by normal mode
50      - description: Reference clock used by low power mode etc
51      - description: Mcu bus clock for register access
52      - description: DMA bus clock for data transfer
53
54  clock-names:
55    minItems: 1
56    items:
57      - const: sys_ck  # required, others are optional
58      - const: ref_ck
59      - const: mcu_ck
60      - const: dma_ck
61
62  phys:
63    description:
64      List of all the USB PHYs used, it's better to keep the sequence
65      as the hardware layout.
66    minItems: 1
67    items:
68      - description: USB2/HS PHY    # required, others are optional
69      - description: USB3/SS(P) PHY
70      - description: USB2/HS PHY    # the following for backward compatible
71      - description: USB3/SS(P) PHY
72      - description: USB2/HS PHY
73      - description: USB3/SS(P) PHY
74      - description: USB2/HS PHY
75      - description: USB3/SS(P) PHY
76      - description: USB2/HS PHY
77
78  vusb33-supply:
79    description: Regulator of USB AVDD3.3v
80
81  vbus-supply:
82    deprecated: true
83    description: |
84      Regulator of USB VBUS5v, needed when supports dual-role mode.
85      Particularly, if use an output GPIO to control a VBUS regulator, should
86      model it as a regulator. See bindings/regulator/fixed-regulator.yaml
87      It's considered valid for compatibility reasons, not allowed for
88      new bindings, and put into a usb-connector node.
89
90  dr_mode:
91    enum: [host, peripheral, otg]
92    default: otg
93
94  maximum-speed:
95    enum: [super-speed-plus, super-speed, high-speed, full-speed]
96
97  "#address-cells":
98    enum: [1, 2]
99
100  "#size-cells":
101    enum: [1, 2]
102
103  ranges: true
104
105  extcon:
106    deprecated: true
107    description: |
108      Phandle to the extcon device detecting the IDDIG/VBUS state, neede
109      when supports dual-role mode.
110      It's considered valid for compatibility reasons, not allowed for
111      new bindings, and use "usb-role-switch" property instead.
112
113  usb-role-switch:
114    $ref: /schemas/types.yaml#/definitions/flag
115    description: Support role switch.
116    type: boolean
117
118  connector:
119    $ref: /connector/usb-connector.yaml#
120    description:
121      Connector for dual role switch, especially for "gpio-usb-b-connector"
122    type: object
123
124  port:
125    description:
126      Any connector to the data bus of this controller should be modelled
127      using the OF graph bindings specified, if the "usb-role-switch"
128      property is used. See graph.txt
129    type: object
130
131  enable-manual-drd:
132    $ref: /schemas/types.yaml#/definitions/flag
133    description:
134      supports manual dual-role switch via debugfs; usually used when
135      receptacle is TYPE-A and also wants to support dual-role mode.
136    type: boolean
137
138  wakeup-source:
139    description: enable USB remote wakeup, see power/wakeup-source.txt
140    type: boolean
141
142  mediatek,syscon-wakeup:
143    $ref: /schemas/types.yaml#/definitions/phandle-array
144    maxItems: 1
145    description:
146      A phandle to syscon used to access the register of the USB wakeup glue
147      layer between xHCI and SPM, the field should always be 3 cells long.
148    items:
149      items:
150        - description:
151            The first cell represents a phandle to syscon
152        - description:
153            The second cell represents the register base address of the glue
154            layer in syscon
155        - description:
156            The third cell represents the hardware version of the glue layer,
157            1 is used by mt8173 etc, 2 is used by mt2712 etc
158          enum: [1, 2]
159
160  mediatek,u3p-dis-msk:
161    $ref: /schemas/types.yaml#/definitions/uint32
162    description: The mask to disable u3ports, bit0 for u3port0,
163      bit1 for u3port1, ... etc
164
165# Required child node when support dual-role
166patternProperties:
167  "^usb@[0-9a-f]+$":
168    type: object
169    $ref: /usb/mediatek,mtk-xhci.yaml#
170    description:
171      The xhci should be added as subnode to mtu3 as shown in the following
172      example if the host mode is enabled.
173
174dependencies:
175  connector: [ 'usb-role-switch' ]
176  port: [ 'usb-role-switch' ]
177  wakeup-source: [ 'mediatek,syscon-wakeup' ]
178
179required:
180  - compatible
181  - reg
182  - reg-names
183  - interrupts
184  - clocks
185  - clock-names
186
187additionalProperties: false
188
189examples:
190  # Dual role switch by extcon
191  - |
192    #include <dt-bindings/clock/mt8173-clk.h>
193    #include <dt-bindings/interrupt-controller/arm-gic.h>
194    #include <dt-bindings/interrupt-controller/irq.h>
195    #include <dt-bindings/phy/phy.h>
196    #include <dt-bindings/power/mt8173-power.h>
197
198    usb@11271000 {
199        compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
200        reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
201        reg-names = "mac", "ippc";
202        interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
203        phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
204        power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
205        clocks = <&topckgen CLK_TOP_USB30_SEL>;
206        clock-names = "sys_ck";
207        vusb33-supply = <&mt6397_vusb_reg>;
208        vbus-supply = <&usb_p0_vbus>;
209        extcon = <&extcon_usb>;
210        dr_mode = "otg";
211        wakeup-source;
212        mediatek,syscon-wakeup = <&pericfg 0x400 1>;
213        #address-cells = <1>;
214        #size-cells = <1>;
215        ranges;
216
217        xhci: usb@11270000 {
218            compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
219            reg = <0x11270000 0x1000>;
220            reg-names = "mac";
221            interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
222            power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
223            clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
224            clock-names = "sys_ck", "ref_ck";
225            vusb33-supply = <&mt6397_vusb_reg>;
226        };
227    };
228
229  # Enable/disable device by an input gpio for VBUS pin
230  - |
231    #include <dt-bindings/gpio/gpio.h>
232    #include <dt-bindings/power/mt2712-power.h>
233
234    usb@112c1000 {
235        compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
236        reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
237        reg-names = "mac", "ippc";
238        interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
239        phys = <&u2port2 PHY_TYPE_USB2>;
240        power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
241        clocks = <&topckgen CLK_TOP_USB30_SEL>;
242        clock-names = "sys_ck";
243        dr_mode = "peripheral";
244        usb-role-switch;
245
246        connector {
247            compatible = "gpio-usb-b-connector", "usb-b-connector";
248            type = "micro";
249            vbus-gpios = <&pio 13 GPIO_ACTIVE_HIGH>;
250        };
251    };
252
253  # Dual role switch with type-c
254  - |
255    usb@11201000 {
256        compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
257        reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
258        reg-names = "mac", "ippc";
259        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
260        phys = <&u2port0 PHY_TYPE_USB2>;
261        clocks = <&clk26m>;
262        clock-names = "sys_ck";
263        mediatek,syscon-wakeup = <&pericfg 0x400 1>;
264        wakeup-source;
265        dr_mode = "otg";
266        usb-role-switch;
267        #address-cells = <1>;
268        #size-cells = <1>;
269        ranges;
270
271        host: usb@11200000 {
272            compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
273            reg = <0x11200000 0x1000>;
274            reg-names = "mac";
275            interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
276            clocks = <&clk26m>;
277            clock-names = "sys_ck";
278        };
279
280        port {
281            usb_role_sw: endpoint {
282                remote-endpoint = <&hs_ep>;
283            };
284        };
285    };
286
287...
288