1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek USB3 xHCI Device Tree Bindings
9
10maintainers:
11  - Chunfeng Yun <chunfeng.yun@mediatek.com>
12
13allOf:
14  - $ref: "usb-xhci.yaml"
15
16description: |
17  There are two scenarios:
18  case 1: only supports xHCI driver;
19  case 2: supports dual-role mode, and the host is based on xHCI driver.
20
21properties:
22  # common properties for both case 1 and case 2
23  compatible:
24    items:
25      - enum:
26          - mediatek,mt2701-xhci
27          - mediatek,mt2712-xhci
28          - mediatek,mt7622-xhci
29          - mediatek,mt7623-xhci
30          - mediatek,mt7629-xhci
31          - mediatek,mt8173-xhci
32          - mediatek,mt8183-xhci
33          - mediatek,mt8186-xhci
34          - mediatek,mt8192-xhci
35          - mediatek,mt8195-xhci
36      - const: mediatek,mtk-xhci
37
38  reg:
39    minItems: 1
40    items:
41      - description: the registers of xHCI MAC
42      - description: the registers of IP Port Control
43
44  reg-names:
45    minItems: 1
46    items:
47      - const: mac
48      - const: ippc  # optional, only needed for case 1.
49
50  interrupts:
51    description:
52      use "interrupts-extended" when the interrupts are connected to the
53      separate interrupt controllers
54    minItems: 1
55    items:
56      - description: xHCI host controller interrupt
57      - description: optional, wakeup interrupt used to support runtime PM
58
59  interrupt-names:
60    items:
61      - const: host
62      - const: wakeup
63
64  power-domains:
65    description: A phandle to USB power domain node to control USB's MTCMOS
66    maxItems: 1
67
68  clocks:
69    minItems: 1
70    items:
71      - description: Controller clock used by normal mode
72      - description: Reference clock used by low power mode etc
73      - description: Mcu bus clock for register access
74      - description: DMA bus clock for data transfer
75      - description: controller clock
76
77  clock-names:
78    minItems: 1
79    items:
80      - const: sys_ck  # required, the following ones are optional
81      - const: ref_ck
82      - const: mcu_ck
83      - const: dma_ck
84      - const: xhci_ck
85
86  assigned-clocks:
87    minItems: 1
88    maxItems: 5
89
90  assigned-clock-parents:
91    minItems: 1
92    maxItems: 5
93
94  phys:
95    description:
96      List of all PHYs used on this HCD, it's better to keep PHYs in order
97      as the hardware layout
98    minItems: 1
99    items:
100      - description: USB2/HS PHY    # required, others are optional
101      - description: USB3/SS(P) PHY
102      - description: USB2/HS PHY
103      - description: USB3/SS(P) PHY
104      - description: USB2/HS PHY
105      - description: USB3/SS(P) PHY
106      - description: USB2/HS PHY
107      - description: USB3/SS(P) PHY
108      - description: USB2/HS PHY
109
110  vusb33-supply:
111    description: Regulator of USB AVDD3.3v
112
113  vbus-supply:
114    description: Regulator of USB VBUS5v
115
116  usb3-lpm-capable: true
117
118  usb2-lpm-disable: true
119
120  imod-interval-ns:
121    description:
122      Interrupt moderation interval value, it is 8 times as much as that
123      defined in the xHCI spec on MTK's controller.
124    default: 5000
125
126  # the following properties are only used for case 1
127  wakeup-source:
128    description: enable USB remote wakeup, see power/wakeup-source.txt
129    type: boolean
130
131  mediatek,syscon-wakeup:
132    $ref: /schemas/types.yaml#/definitions/phandle-array
133    maxItems: 1
134    description:
135      A phandle to syscon used to access the register of the USB wakeup glue
136      layer between xHCI and SPM, the field should always be 3 cells long.
137    items:
138      items:
139        - description:
140            The first cell represents a phandle to syscon
141        - description:
142            The second cell represents the register base address of the glue
143            layer in syscon
144        - description: |
145            The third cell represents the hardware version of the glue layer,
146            1 - used by mt8173 etc, revision 1 without following IPM rule;
147            2 - used by mt2712 etc, revision 2 following IPM rule;
148            101 - used by mt8183, specific 1.01;
149            102 - used by mt8192, specific 1.02;
150            103 - used by mt8195, IP0, specific 1.03;
151            104 - used by mt8195, IP1, specific 1.04;
152            105 - used by mt8195, IP2, specific 1.05;
153            106 - used by mt8195, IP3, specific 1.06;
154          enum: [1, 2, 101, 102, 103, 104, 105, 106]
155
156  mediatek,u3p-dis-msk:
157    $ref: /schemas/types.yaml#/definitions/uint32
158    description: The mask to disable u3ports, bit0 for u3port0,
159      bit1 for u3port1, ... etc
160
161  mediatek,u2p-dis-msk:
162    $ref: /schemas/types.yaml#/definitions/uint32
163    description: The mask to disable u2ports, bit0 for u2port0,
164      bit1 for u2port1, ... etc
165
166  "#address-cells":
167    const: 1
168
169  "#size-cells":
170    const: 0
171
172patternProperties:
173  "@[0-9a-f]{1}$":
174    type: object
175    description: The hard wired USB devices.
176
177dependencies:
178  wakeup-source: [ 'mediatek,syscon-wakeup' ]
179
180required:
181  - compatible
182  - reg
183  - reg-names
184  - interrupts
185  - clocks
186  - clock-names
187
188additionalProperties: false
189
190examples:
191  - |
192    #include <dt-bindings/clock/mt8173-clk.h>
193    #include <dt-bindings/interrupt-controller/arm-gic.h>
194    #include <dt-bindings/interrupt-controller/irq.h>
195    #include <dt-bindings/phy/phy.h>
196    #include <dt-bindings/power/mt8173-power.h>
197
198    usb@11270000 {
199        compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
200        reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
201        reg-names = "mac", "ippc";
202        interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
203        power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
204        clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
205        clock-names = "sys_ck", "ref_ck";
206        phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
207        vusb33-supply = <&mt6397_vusb_reg>;
208        vbus-supply = <&usb_p1_vbus>;
209        imod-interval-ns = <10000>;
210        mediatek,syscon-wakeup = <&pericfg 0x400 1>;
211        wakeup-source;
212        usb3-lpm-capable;
213    };
214...
215