1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2020 MediaTek 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: MediaTek USB3 xHCI Device Tree Bindings 9 10maintainers: 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 12 13allOf: 14 - $ref: "usb-xhci.yaml" 15 16description: | 17 There are two scenarios: 18 case 1: only supports xHCI driver; 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 20 21properties: 22 # common properties for both case 1 and case 2 23 compatible: 24 items: 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci 28 - mediatek,mt7622-xhci 29 - mediatek,mt7623-xhci 30 - mediatek,mt7629-xhci 31 - mediatek,mt8173-xhci 32 - mediatek,mt8183-xhci 33 - mediatek,mt8192-xhci 34 - mediatek,mt8195-xhci 35 - const: mediatek,mtk-xhci 36 37 reg: 38 minItems: 1 39 items: 40 - description: the registers of xHCI MAC 41 - description: the registers of IP Port Control 42 43 reg-names: 44 minItems: 1 45 items: 46 - const: mac 47 - const: ippc # optional, only needed for case 1. 48 49 interrupts: 50 description: 51 use "interrupts-extended" when the interrupts are connected to the 52 separate interrupt controllers 53 minItems: 1 54 items: 55 - description: xHCI host controller interrupt 56 - description: optional, wakeup interrupt used to support runtime PM 57 58 interrupt-names: 59 items: 60 - const: host 61 - const: wakeup 62 63 power-domains: 64 description: A phandle to USB power domain node to control USB's MTCMOS 65 maxItems: 1 66 67 clocks: 68 minItems: 1 69 items: 70 - description: Controller clock used by normal mode 71 - description: Reference clock used by low power mode etc 72 - description: Mcu bus clock for register access 73 - description: DMA bus clock for data transfer 74 - description: controller clock 75 76 clock-names: 77 minItems: 1 78 items: 79 - const: sys_ck # required, the following ones are optional 80 - const: ref_ck 81 - const: mcu_ck 82 - const: dma_ck 83 - const: xhci_ck 84 85 assigned-clocks: 86 minItems: 1 87 maxItems: 5 88 89 assigned-clock-parents: 90 minItems: 1 91 maxItems: 5 92 93 phys: 94 description: 95 List of all PHYs used on this HCD, it's better to keep PHYs in order 96 as the hardware layout 97 minItems: 1 98 items: 99 - description: USB2/HS PHY # required, others are optional 100 - description: USB3/SS(P) PHY 101 - description: USB2/HS PHY 102 - description: USB3/SS(P) PHY 103 - description: USB2/HS PHY 104 - description: USB3/SS(P) PHY 105 - description: USB2/HS PHY 106 - description: USB3/SS(P) PHY 107 - description: USB2/HS PHY 108 109 vusb33-supply: 110 description: Regulator of USB AVDD3.3v 111 112 vbus-supply: 113 description: Regulator of USB VBUS5v 114 115 usb3-lpm-capable: true 116 117 usb2-lpm-disable: true 118 119 imod-interval-ns: 120 description: 121 Interrupt moderation interval value, it is 8 times as much as that 122 defined in the xHCI spec on MTK's controller. 123 default: 5000 124 125 # the following properties are only used for case 1 126 wakeup-source: 127 description: enable USB remote wakeup, see power/wakeup-source.txt 128 type: boolean 129 130 mediatek,syscon-wakeup: 131 $ref: /schemas/types.yaml#/definitions/phandle-array 132 maxItems: 1 133 description: 134 A phandle to syscon used to access the register of the USB wakeup glue 135 layer between xHCI and SPM, the field should always be 3 cells long. 136 items: 137 items: 138 - description: 139 The first cell represents a phandle to syscon 140 - description: 141 The second cell represents the register base address of the glue 142 layer in syscon 143 - description: | 144 The third cell represents the hardware version of the glue layer, 145 1 - used by mt8173 etc, revision 1 without following IPM rule; 146 2 - used by mt2712 etc, revision 2 following IPM rule; 147 101 - used by mt8183, specific 1.01; 148 102 - used by mt8192, specific 1.02; 149 enum: [1, 2, 101, 102] 150 151 mediatek,u3p-dis-msk: 152 $ref: /schemas/types.yaml#/definitions/uint32 153 description: The mask to disable u3ports, bit0 for u3port0, 154 bit1 for u3port1, ... etc 155 156 mediatek,u2p-dis-msk: 157 $ref: /schemas/types.yaml#/definitions/uint32 158 description: The mask to disable u2ports, bit0 for u2port0, 159 bit1 for u2port1, ... etc 160 161 "#address-cells": 162 const: 1 163 164 "#size-cells": 165 const: 0 166 167patternProperties: 168 "@[0-9a-f]{1}$": 169 type: object 170 description: The hard wired USB devices. 171 172dependencies: 173 wakeup-source: [ 'mediatek,syscon-wakeup' ] 174 175required: 176 - compatible 177 - reg 178 - reg-names 179 - interrupts 180 - clocks 181 - clock-names 182 183additionalProperties: false 184 185examples: 186 - | 187 #include <dt-bindings/clock/mt8173-clk.h> 188 #include <dt-bindings/interrupt-controller/arm-gic.h> 189 #include <dt-bindings/interrupt-controller/irq.h> 190 #include <dt-bindings/phy/phy.h> 191 #include <dt-bindings/power/mt8173-power.h> 192 193 usb@11270000 { 194 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci"; 195 reg = <0x11270000 0x1000>, <0x11280700 0x0100>; 196 reg-names = "mac", "ippc"; 197 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 198 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 199 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; 200 clock-names = "sys_ck", "ref_ck"; 201 phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>; 202 vusb33-supply = <&mt6397_vusb_reg>; 203 vbus-supply = <&usb_p1_vbus>; 204 imod-interval-ns = <10000>; 205 mediatek,syscon-wakeup = <&pericfg 0x400 1>; 206 wakeup-source; 207 usb3-lpm-capable; 208 }; 209... 210