1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/intel,keembay-dwc3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Intel Keem Bay DWC3 USB controller
8
9maintainers:
10  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
11
12properties:
13  compatible:
14    const: intel,keembay-dwc3
15
16  clocks:
17    maxItems: 4
18
19  clock-names:
20    items:
21      - const: async_master
22      - const: ref
23      - const: alt_ref
24      - const: suspend
25
26  ranges: true
27
28  '#address-cells':
29    enum: [ 1, 2 ]
30
31  '#size-cells':
32    enum: [ 1, 2 ]
33
34# Required child node:
35
36patternProperties:
37  "^dwc3@[0-9a-f]+$":
38    type: object
39    description:
40      A child node must exist to represent the core DWC3 IP block.
41      The content of the node is defined in dwc3.txt.
42
43required:
44  - compatible
45  - clocks
46  - clock-names
47  - ranges
48
49additionalProperties: false
50
51examples:
52  - |
53    #include <dt-bindings/interrupt-controller/arm-gic.h>
54    #include <dt-bindings/interrupt-controller/irq.h>
55    #define KEEM_BAY_A53_AUX_USB
56    #define KEEM_BAY_A53_AUX_USB_REF
57    #define KEEM_BAY_A53_AUX_USB_ALT_REF
58    #define KEEM_BAY_A53_AUX_USB_SUSPEND
59
60    usb {
61          compatible = "intel,keembay-dwc3";
62          clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>,
63                   <&scmi_clk KEEM_BAY_A53_AUX_USB_REF>,
64                   <&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>,
65                   <&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>;
66          clock-names = "async_master", "ref", "alt_ref", "suspend";
67          ranges;
68          #address-cells = <1>;
69          #size-cells = <1>;
70
71          dwc3@34000000 {
72                compatible = "snps,dwc3";
73                reg = <0x34000000 0x10000>;
74                interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
75                dr_mode = "peripheral";
76          };
77    };
78