1*d2a704e2SLi Jun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*d2a704e2SLi Jun# Copyright (c) 2020 NXP
3*d2a704e2SLi Jun%YAML 1.2
4*d2a704e2SLi Jun---
5*d2a704e2SLi Jun$id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6*d2a704e2SLi Jun$schema: http://devicetree.org/meta-schemas/core.yaml#
7*d2a704e2SLi Jun
8*d2a704e2SLi Juntitle: NXP iMX8MP Soc USB Controller
9*d2a704e2SLi Jun
10*d2a704e2SLi Junmaintainers:
11*d2a704e2SLi Jun  - Li Jun <jun.li@nxp.com>
12*d2a704e2SLi Jun
13*d2a704e2SLi Junproperties:
14*d2a704e2SLi Jun  compatible:
15*d2a704e2SLi Jun    const: fsl,imx8mp-dwc3
16*d2a704e2SLi Jun
17*d2a704e2SLi Jun  reg:
18*d2a704e2SLi Jun    maxItems: 1
19*d2a704e2SLi Jun    description: Address and length of the register set for the wrapper of
20*d2a704e2SLi Jun      dwc3 core on the SOC.
21*d2a704e2SLi Jun
22*d2a704e2SLi Jun  "#address-cells":
23*d2a704e2SLi Jun    enum: [ 1, 2 ]
24*d2a704e2SLi Jun
25*d2a704e2SLi Jun  "#size-cells":
26*d2a704e2SLi Jun    enum: [ 1, 2 ]
27*d2a704e2SLi Jun
28*d2a704e2SLi Jun  dma-ranges:
29*d2a704e2SLi Jun    description:
30*d2a704e2SLi Jun      See section 2.3.9 of the DeviceTree Specification.
31*d2a704e2SLi Jun
32*d2a704e2SLi Jun  ranges: true
33*d2a704e2SLi Jun
34*d2a704e2SLi Jun  interrupts:
35*d2a704e2SLi Jun    maxItems: 1
36*d2a704e2SLi Jun    description: The interrupt that is asserted when a wakeup event is
37*d2a704e2SLi Jun      received.
38*d2a704e2SLi Jun
39*d2a704e2SLi Jun  clocks:
40*d2a704e2SLi Jun    description:
41*d2a704e2SLi Jun      A list of phandle and clock-specifier pairs for the clocks
42*d2a704e2SLi Jun      listed in clock-names.
43*d2a704e2SLi Jun    items:
44*d2a704e2SLi Jun      - description: system hsio root clock.
45*d2a704e2SLi Jun      - description: suspend clock, used for usb wakeup logic.
46*d2a704e2SLi Jun
47*d2a704e2SLi Jun  clock-names:
48*d2a704e2SLi Jun    items:
49*d2a704e2SLi Jun      - const: hsio
50*d2a704e2SLi Jun      - const: suspend
51*d2a704e2SLi Jun
52*d2a704e2SLi Jun# Required child node:
53*d2a704e2SLi Jun
54*d2a704e2SLi JunpatternProperties:
55*d2a704e2SLi Jun  "^dwc3@[0-9a-f]+$":
56*d2a704e2SLi Jun    type: object
57*d2a704e2SLi Jun    description:
58*d2a704e2SLi Jun      A child node must exist to represent the core DWC3 IP block
59*d2a704e2SLi Jun      The content of the node is defined in dwc3.txt.
60*d2a704e2SLi Jun
61*d2a704e2SLi Junrequired:
62*d2a704e2SLi Jun  - compatible
63*d2a704e2SLi Jun  - reg
64*d2a704e2SLi Jun  - "#address-cells"
65*d2a704e2SLi Jun  - "#size-cells"
66*d2a704e2SLi Jun  - dma-ranges
67*d2a704e2SLi Jun  - ranges
68*d2a704e2SLi Jun  - clocks
69*d2a704e2SLi Jun  - clock-names
70*d2a704e2SLi Jun  - interrupts
71*d2a704e2SLi Jun
72*d2a704e2SLi JunadditionalProperties: false
73*d2a704e2SLi Jun
74*d2a704e2SLi Junexamples:
75*d2a704e2SLi Jun  - |
76*d2a704e2SLi Jun    #include <dt-bindings/clock/imx8mp-clock.h>
77*d2a704e2SLi Jun    #include <dt-bindings/interrupt-controller/arm-gic.h>
78*d2a704e2SLi Jun    usb3_0: usb@32f10100 {
79*d2a704e2SLi Jun      compatible = "fsl,imx8mp-dwc3";
80*d2a704e2SLi Jun      reg = <0x32f10100 0x8>;
81*d2a704e2SLi Jun      clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
82*d2a704e2SLi Jun               <&clk IMX8MP_CLK_USB_ROOT>;
83*d2a704e2SLi Jun      clock-names = "hsio", "suspend";
84*d2a704e2SLi Jun      interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
85*d2a704e2SLi Jun      #address-cells = <1>;
86*d2a704e2SLi Jun      #size-cells = <1>;
87*d2a704e2SLi Jun      dma-ranges = <0x40000000 0x40000000 0xc0000000>;
88*d2a704e2SLi Jun      ranges;
89*d2a704e2SLi Jun
90*d2a704e2SLi Jun      dwc3@38100000 {
91*d2a704e2SLi Jun        compatible = "snps,dwc3";
92*d2a704e2SLi Jun        reg = <0x38100000 0x10000>;
93*d2a704e2SLi Jun        clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
94*d2a704e2SLi Jun                 <&clk IMX8MP_CLK_USB_CORE_REF>,
95*d2a704e2SLi Jun                 <&clk IMX8MP_CLK_USB_ROOT>;
96*d2a704e2SLi Jun        clock-names = "bus_early", "ref", "suspend";
97*d2a704e2SLi Jun        assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
98*d2a704e2SLi Jun        assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
99*d2a704e2SLi Jun        assigned-clock-rates = <500000000>;
100*d2a704e2SLi Jun        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
101*d2a704e2SLi Jun        phys = <&usb3_phy0>, <&usb3_phy0>;
102*d2a704e2SLi Jun        phy-names = "usb2-phy", "usb3-phy";
103*d2a704e2SLi Jun        snps,dis-u2-freeclk-exists-quirk;
104*d2a704e2SLi Jun      };
105*d2a704e2SLi Jun    };
106