1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/dwc2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: DesignWare HS OTG USB 2.0 controller Bindings
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  compatible:
14    oneOf:
15      - const: brcm,bcm2835-usb
16      - const: hisilicon,hi6220-usb
17      - items:
18          - const: rockchip,rk3066-usb
19          - const: snps,dwc2
20      - items:
21          - enum:
22            - rockchip,px30-usb
23            - rockchip,rk3036-usb
24            - rockchip,rk3188-usb
25            - rockchip,rk3228-usb
26            - rockchip,rk3288-usb
27            - rockchip,rk3328-usb
28            - rockchip,rk3368-usb
29            - rockchip,rv1108-usb
30          - const: rockchip,rk3066-usb
31          - const: snps,dwc2
32      - const: lantiq,arx100-usb
33      - const: lantiq,xrx200-usb
34      - items:
35          - const: amlogic,meson8-usb
36          - const: snps,dwc2
37      - items:
38          - const: amlogic,meson8b-usb
39          - const: snps,dwc2
40      - const: amlogic,meson-gxbb-usb
41      - items:
42          - const: amlogic,meson-g12a-usb
43          - const: snps,dwc2
44      - const: amcc,dwc-otg
45      - const: snps,dwc2
46      - const: st,stm32f4x9-fsotg
47      - const: st,stm32f4x9-hsotg
48      - const: st,stm32f7-hsotg
49      - const: samsung,s3c6400-hsotg
50
51  reg:
52    maxItems: 1
53
54  interrupts:
55    maxItems: 1
56
57  clocks:
58    maxItems: 1
59
60  clock-names:
61    items:
62      - const: otg
63
64  resets:
65    items:
66     - description: common reset
67     - description: ecc reset
68    minItems: 1
69
70  reset-names:
71    items:
72     - const: dwc2
73     - const: dwc2-ecc
74    minItems: 1
75
76  phys:
77    maxItems: 1
78
79  phy-names:
80    const: usb2-phy
81
82  vbus-supply:
83    description: reference to the VBUS regulator. Depending on the current mode
84      this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
85      regulator is updated if the controller is configured in "otg" mode and the
86      status changes between "host" and "peripheral".
87
88  vusb_d-supply:
89    description: phandle to voltage regulator of digital section,
90
91  vusb_a-supply:
92    description: phandle to voltage regulator of analog section.
93
94  dr_mode:
95    enum: [host, peripheral, otg]
96
97  g-rx-fifo-size:
98    $ref: /schemas/types.yaml#/definitions/uint32
99    description: size of rx fifo size in gadget mode.
100
101  g-np-tx-fifo-size:
102    $ref: /schemas/types.yaml#/definitions/uint32
103    description: size of non-periodic tx fifo size in gadget mode.
104
105  g-tx-fifo-size:
106    $ref: /schemas/types.yaml#/definitions/uint32-array
107    description: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
108
109  snps,need-phy-for-wake:
110    $ref: /schemas/types.yaml#/definitions/flag
111    description: If present indicates that the phy needs to be left on for remote wakeup during suspend.
112
113  snps,reset-phy-on-wake:
114    $ref: /schemas/types.yaml#/definitions/flag
115    description: If present indicates that we need to reset the PHY when we detect a wakeup.
116                 This is due to a hardware errata.
117
118required:
119  - compatible
120  - reg
121  - interrupts
122  - clocks
123  - clock-names
124
125additionalProperties: false
126
127examples:
128  - |
129      usb@101c0000 {
130        compatible = "rockchip,rk3066-usb", "snps,dwc2";
131        reg = <0x10180000 0x40000>;
132        interrupts = <18>;
133        clocks = <&usb_otg_ahb_clk>;
134        clock-names = "otg";
135        phys = <&usbphy>;
136        phy-names = "usb2-phy";
137      };
138
139...
140