1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/dwc2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: DesignWare HS OTG USB 2.0 controller Bindings
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  compatible:
14    oneOf:
15      - const: brcm,bcm2835-usb
16      - const: hisilicon,hi6220-usb
17      - items:
18          - const: rockchip,rk3066-usb
19          - const: snps,dwc2
20      - items:
21          - enum:
22              - rockchip,px30-usb
23              - rockchip,rk3036-usb
24              - rockchip,rk3188-usb
25              - rockchip,rk3228-usb
26              - rockchip,rk3288-usb
27              - rockchip,rk3328-usb
28              - rockchip,rk3368-usb
29              - rockchip,rv1108-usb
30          - const: rockchip,rk3066-usb
31          - const: snps,dwc2
32      - const: lantiq,arx100-usb
33      - const: lantiq,xrx200-usb
34      - items:
35          - enum:
36              - amlogic,meson8-usb
37              - amlogic,meson8b-usb
38              - amlogic,meson-gxbb-usb
39              - amlogic,meson-g12a-usb
40          - const: snps,dwc2
41      - const: amcc,dwc-otg
42      - const: snps,dwc2
43      - const: st,stm32f4x9-fsotg
44      - const: st,stm32f4x9-hsotg
45      - const: st,stm32f7-hsotg
46      - const: st,stm32mp15-fsotg
47      - items:
48          - const: st,stm32mp15-hsotg
49          - const: snps,dwc2
50      - const: samsung,s3c6400-hsotg
51
52  reg:
53    maxItems: 1
54
55  interrupts:
56    maxItems: 1
57
58  clocks:
59    maxItems: 1
60
61  clock-names:
62    items:
63      - const: otg
64
65  resets:
66    items:
67      - description: common reset
68      - description: ecc reset
69    minItems: 1
70
71  reset-names:
72    items:
73      - const: dwc2
74      - const: dwc2-ecc
75    minItems: 1
76
77  phys:
78    maxItems: 1
79
80  phy-names:
81    const: usb2-phy
82
83  power-domains:
84    maxItems: 1
85
86  vbus-supply:
87    description: reference to the VBUS regulator. Depending on the current mode
88      this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
89      regulator is updated if the controller is configured in "otg" mode and the
90      status changes between "host" and "peripheral".
91
92  vusb_d-supply:
93    description: phandle to voltage regulator of digital section,
94
95  vusb_a-supply:
96    description: phandle to voltage regulator of analog section.
97
98  usb33d-supply:
99    description: reference to the VBUS and ID sensing comparators supply, in
100      order to perform OTG operation, used on STM32MP15 SoCs.
101
102  dr_mode:
103    enum: [host, peripheral, otg]
104
105  g-rx-fifo-size:
106    $ref: /schemas/types.yaml#/definitions/uint32
107    description: size of rx fifo size in gadget mode.
108
109  g-np-tx-fifo-size:
110    $ref: /schemas/types.yaml#/definitions/uint32
111    description: size of non-periodic tx fifo size in gadget mode.
112
113  g-tx-fifo-size:
114    $ref: /schemas/types.yaml#/definitions/uint32-array
115    description: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
116
117  snps,need-phy-for-wake:
118    $ref: /schemas/types.yaml#/definitions/flag
119    description: If present indicates that the phy needs to be left on for
120      remote wakeup during suspend.
121
122  snps,reset-phy-on-wake:
123    $ref: /schemas/types.yaml#/definitions/flag
124    description: If present indicates that we need to reset the PHY when we
125      detect a wakeup. This is due to a hardware errata.
126
127required:
128  - compatible
129  - reg
130  - interrupts
131  - clocks
132  - clock-names
133
134additionalProperties: false
135
136examples:
137  - |
138      usb@101c0000 {
139        compatible = "rockchip,rk3066-usb", "snps,dwc2";
140        reg = <0x10180000 0x40000>;
141        interrupts = <18>;
142        clocks = <&usb_otg_ahb_clk>;
143        clock-names = "otg";
144        phys = <&usbphy>;
145        phy-names = "usb2-phy";
146      };
147
148...
149