1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/dwc2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: DesignWare HS OTG USB 2.0 controller Bindings 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: usb-drd.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - const: brcm,bcm2835-usb 19 - const: hisilicon,hi6220-usb 20 - items: 21 - const: rockchip,rk3066-usb 22 - const: snps,dwc2 23 - items: 24 - enum: 25 - rockchip,px30-usb 26 - rockchip,rk3036-usb 27 - rockchip,rk3188-usb 28 - rockchip,rk3228-usb 29 - rockchip,rk3288-usb 30 - rockchip,rk3308-usb 31 - rockchip,rk3328-usb 32 - rockchip,rk3368-usb 33 - rockchip,rv1108-usb 34 - const: rockchip,rk3066-usb 35 - const: snps,dwc2 36 - const: lantiq,arx100-usb 37 - const: lantiq,xrx200-usb 38 - items: 39 - enum: 40 - amlogic,meson8-usb 41 - amlogic,meson8b-usb 42 - amlogic,meson-gxbb-usb 43 - amlogic,meson-g12a-usb 44 - intel,socfpga-agilex-hsotg 45 - const: snps,dwc2 46 - const: amcc,dwc-otg 47 - const: apm,apm82181-dwc-otg 48 - const: snps,dwc2 49 - const: st,stm32f4x9-fsotg 50 - const: st,stm32f4x9-hsotg 51 - const: st,stm32f7-hsotg 52 - const: st,stm32mp15-fsotg 53 - items: 54 - const: st,stm32mp15-hsotg 55 - const: snps,dwc2 56 - const: samsung,s3c6400-hsotg 57 - const: intel,socfpga-agilex-hsotg 58 59 reg: 60 maxItems: 1 61 62 interrupts: 63 maxItems: 1 64 65 clocks: 66 maxItems: 1 67 68 clock-names: 69 items: 70 - const: otg 71 72 disable-over-current: 73 type: boolean 74 description: whether to disable detection of over-current condition. 75 76 iommus: 77 maxItems: 1 78 79 resets: 80 items: 81 - description: common reset 82 - description: ecc reset 83 minItems: 1 84 85 reset-names: 86 items: 87 - const: dwc2 88 - const: dwc2-ecc 89 minItems: 1 90 91 phys: 92 maxItems: 1 93 94 phy-names: 95 const: usb2-phy 96 97 power-domains: 98 maxItems: 1 99 100 vbus-supply: 101 description: reference to the VBUS regulator. Depending on the current mode 102 this is enabled (in "host" mode") or disabled (in "peripheral" mode). The 103 regulator is updated if the controller is configured in "otg" mode and the 104 status changes between "host" and "peripheral". 105 106 vusb_d-supply: 107 description: phandle to voltage regulator of digital section, 108 109 vusb_a-supply: 110 description: phandle to voltage regulator of analog section. 111 112 usb33d-supply: 113 description: reference to the VBUS and ID sensing comparators supply, in 114 order to perform OTG operation, used on STM32MP15 SoCs. 115 116 dr_mode: true 117 118 otg-rev: true 119 120 hnp-disable: true 121 122 srp-disable: true 123 124 usb-role-switch: true 125 126 role-switch-default-mode: true 127 128 g-rx-fifo-size: 129 $ref: /schemas/types.yaml#/definitions/uint32 130 description: size of rx fifo size in gadget mode. 131 132 g-np-tx-fifo-size: 133 $ref: /schemas/types.yaml#/definitions/uint32 134 description: size of non-periodic tx fifo size in gadget mode. 135 136 g-tx-fifo-size: 137 $ref: /schemas/types.yaml#/definitions/uint32-array 138 description: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 139 140 snps,need-phy-for-wake: 141 $ref: /schemas/types.yaml#/definitions/flag 142 description: If present indicates that the phy needs to be left on for 143 remote wakeup during suspend. 144 145 snps,reset-phy-on-wake: 146 $ref: /schemas/types.yaml#/definitions/flag 147 description: If present indicates that we need to reset the PHY when we 148 detect a wakeup. This is due to a hardware errata. 149 150 port: 151 description: 152 Any connector to the data bus of this controller should be modelled 153 using the OF graph bindings specified, if the "usb-role-switch" 154 property is used. 155 $ref: /schemas/graph.yaml#/properties/port 156 157dependencies: 158 port: [ usb-role-switch ] 159 role-switch-default-mode: [ usb-role-switch ] 160 161required: 162 - compatible 163 - reg 164 - interrupts 165 - clocks 166 - clock-names 167 168additionalProperties: false 169 170examples: 171 - | 172 usb@101c0000 { 173 compatible = "rockchip,rk3066-usb", "snps,dwc2"; 174 reg = <0x10180000 0x40000>; 175 interrupts = <18>; 176 clocks = <&usb_otg_ahb_clk>; 177 clock-names = "otg"; 178 phys = <&usbphy>; 179 phy-names = "usb2-phy"; 180 }; 181 182... 183