1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/dwc2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: DesignWare HS OTG USB 2.0 controller Bindings 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: usb-drd.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - const: brcm,bcm2835-usb 19 - const: hisilicon,hi6220-usb 20 - items: 21 - const: rockchip,rk3066-usb 22 - const: snps,dwc2 23 - items: 24 - enum: 25 - rockchip,px30-usb 26 - rockchip,rk3036-usb 27 - rockchip,rk3188-usb 28 - rockchip,rk3228-usb 29 - rockchip,rk3288-usb 30 - rockchip,rk3308-usb 31 - rockchip,rk3328-usb 32 - rockchip,rk3368-usb 33 - rockchip,rv1108-usb 34 - const: rockchip,rk3066-usb 35 - const: snps,dwc2 36 - const: lantiq,arx100-usb 37 - const: lantiq,xrx200-usb 38 - items: 39 - enum: 40 - amlogic,meson8-usb 41 - amlogic,meson8b-usb 42 - amlogic,meson-gxbb-usb 43 - amlogic,meson-g12a-usb 44 - intel,socfpga-agilex-hsotg 45 - const: snps,dwc2 46 - const: amcc,dwc-otg 47 - const: apm,apm82181-dwc-otg 48 - const: snps,dwc2 49 - const: st,stm32f4x9-fsotg 50 - const: st,stm32f4x9-hsotg 51 - const: st,stm32f7-hsotg 52 - const: st,stm32mp15-fsotg 53 - items: 54 - const: st,stm32mp15-hsotg 55 - const: snps,dwc2 56 - const: samsung,s3c6400-hsotg 57 58 reg: 59 maxItems: 1 60 61 interrupts: 62 maxItems: 1 63 64 clocks: 65 maxItems: 1 66 67 clock-names: 68 items: 69 - const: otg 70 71 disable-over-current: 72 type: boolean 73 description: whether to disable detection of over-current condition. 74 75 iommus: 76 maxItems: 1 77 78 resets: 79 items: 80 - description: common reset 81 - description: ecc reset 82 minItems: 1 83 84 reset-names: 85 items: 86 - const: dwc2 87 - const: dwc2-ecc 88 minItems: 1 89 90 phys: 91 maxItems: 1 92 93 phy-names: 94 const: usb2-phy 95 96 power-domains: 97 maxItems: 1 98 99 vbus-supply: 100 description: reference to the VBUS regulator. Depending on the current mode 101 this is enabled (in "host" mode") or disabled (in "peripheral" mode). The 102 regulator is updated if the controller is configured in "otg" mode and the 103 status changes between "host" and "peripheral". 104 105 vusb_d-supply: 106 description: phandle to voltage regulator of digital section, 107 108 vusb_a-supply: 109 description: phandle to voltage regulator of analog section. 110 111 usb33d-supply: 112 description: reference to the VBUS and ID sensing comparators supply, in 113 order to perform OTG operation, used on STM32MP15 SoCs. 114 115 dr_mode: true 116 117 otg-rev: true 118 119 hnp-disable: true 120 121 srp-disable: true 122 123 usb-role-switch: true 124 125 role-switch-default-mode: true 126 127 g-rx-fifo-size: 128 $ref: /schemas/types.yaml#/definitions/uint32 129 description: size of rx fifo size in gadget mode. 130 131 g-np-tx-fifo-size: 132 $ref: /schemas/types.yaml#/definitions/uint32 133 description: size of non-periodic tx fifo size in gadget mode. 134 135 g-tx-fifo-size: 136 $ref: /schemas/types.yaml#/definitions/uint32-array 137 description: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 138 139 snps,need-phy-for-wake: 140 $ref: /schemas/types.yaml#/definitions/flag 141 description: If present indicates that the phy needs to be left on for 142 remote wakeup during suspend. 143 144 snps,reset-phy-on-wake: 145 $ref: /schemas/types.yaml#/definitions/flag 146 description: If present indicates that we need to reset the PHY when we 147 detect a wakeup. This is due to a hardware errata. 148 149 port: 150 description: 151 Any connector to the data bus of this controller should be modelled 152 using the OF graph bindings specified, if the "usb-role-switch" 153 property is used. 154 $ref: /schemas/graph.yaml#/properties/port 155 156dependencies: 157 port: [ usb-role-switch ] 158 role-switch-default-mode: [ usb-role-switch ] 159 160required: 161 - compatible 162 - reg 163 - interrupts 164 - clocks 165 - clock-names 166 167additionalProperties: false 168 169examples: 170 - | 171 usb@101c0000 { 172 compatible = "rockchip,rk3066-usb", "snps,dwc2"; 173 reg = <0x10180000 0x40000>; 174 interrupts = <18>; 175 clocks = <&usb_otg_ahb_clk>; 176 clock-names = "otg"; 177 phys = <&usbphy>; 178 phy-names = "usb2-phy"; 179 }; 180 181... 182