1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/dwc2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: DesignWare HS OTG USB 2.0 controller Bindings 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12properties: 13 compatible: 14 oneOf: 15 - const: brcm,bcm2835-usb 16 - const: hisilicon,hi6220-usb 17 - items: 18 - const: rockchip,rk3066-usb 19 - const: snps,dwc2 20 - items: 21 - enum: 22 - rockchip,px30-usb 23 - rockchip,rk3036-usb 24 - rockchip,rk3188-usb 25 - rockchip,rk3228-usb 26 - rockchip,rk3288-usb 27 - rockchip,rk3308-usb 28 - rockchip,rk3328-usb 29 - rockchip,rk3368-usb 30 - rockchip,rv1108-usb 31 - const: rockchip,rk3066-usb 32 - const: snps,dwc2 33 - const: lantiq,arx100-usb 34 - const: lantiq,xrx200-usb 35 - items: 36 - enum: 37 - amlogic,meson8-usb 38 - amlogic,meson8b-usb 39 - amlogic,meson-gxbb-usb 40 - amlogic,meson-g12a-usb 41 - const: snps,dwc2 42 - const: amcc,dwc-otg 43 - const: apm,apm82181-dwc-otg 44 - const: snps,dwc2 45 - const: st,stm32f4x9-fsotg 46 - const: st,stm32f4x9-hsotg 47 - const: st,stm32f7-hsotg 48 - const: st,stm32mp15-fsotg 49 - items: 50 - const: st,stm32mp15-hsotg 51 - const: snps,dwc2 52 - const: samsung,s3c6400-hsotg 53 54 reg: 55 maxItems: 1 56 57 interrupts: 58 maxItems: 1 59 60 clocks: 61 maxItems: 1 62 63 clock-names: 64 items: 65 - const: otg 66 67 resets: 68 items: 69 - description: common reset 70 - description: ecc reset 71 minItems: 1 72 73 reset-names: 74 items: 75 - const: dwc2 76 - const: dwc2-ecc 77 minItems: 1 78 79 phys: 80 maxItems: 1 81 82 phy-names: 83 const: usb2-phy 84 85 power-domains: 86 maxItems: 1 87 88 vbus-supply: 89 description: reference to the VBUS regulator. Depending on the current mode 90 this is enabled (in "host" mode") or disabled (in "peripheral" mode). The 91 regulator is updated if the controller is configured in "otg" mode and the 92 status changes between "host" and "peripheral". 93 94 vusb_d-supply: 95 description: phandle to voltage regulator of digital section, 96 97 vusb_a-supply: 98 description: phandle to voltage regulator of analog section. 99 100 usb33d-supply: 101 description: reference to the VBUS and ID sensing comparators supply, in 102 order to perform OTG operation, used on STM32MP15 SoCs. 103 104 dr_mode: 105 enum: [host, peripheral, otg] 106 107 usb-role-switch: 108 $ref: /schemas/types.yaml#/definitions/flag 109 description: Support role switch. 110 111 g-rx-fifo-size: 112 $ref: /schemas/types.yaml#/definitions/uint32 113 description: size of rx fifo size in gadget mode. 114 115 g-np-tx-fifo-size: 116 $ref: /schemas/types.yaml#/definitions/uint32 117 description: size of non-periodic tx fifo size in gadget mode. 118 119 g-tx-fifo-size: 120 $ref: /schemas/types.yaml#/definitions/uint32-array 121 description: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 122 123 snps,need-phy-for-wake: 124 $ref: /schemas/types.yaml#/definitions/flag 125 description: If present indicates that the phy needs to be left on for 126 remote wakeup during suspend. 127 128 snps,reset-phy-on-wake: 129 $ref: /schemas/types.yaml#/definitions/flag 130 description: If present indicates that we need to reset the PHY when we 131 detect a wakeup. This is due to a hardware errata. 132 133required: 134 - compatible 135 - reg 136 - interrupts 137 - clocks 138 - clock-names 139 140additionalProperties: false 141 142examples: 143 - | 144 usb@101c0000 { 145 compatible = "rockchip,rk3066-usb", "snps,dwc2"; 146 reg = <0x10180000 0x40000>; 147 interrupts = <18>; 148 clocks = <&usb_otg_ahb_clk>; 149 clock-names = "otg"; 150 phys = <&usbphy>; 151 phy-names = "usb2-phy"; 152 }; 153 154... 155