1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/dwc2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: DesignWare HS OTG USB 2.0 controller Bindings 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: usb-drd.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - const: brcm,bcm2835-usb 19 - const: hisilicon,hi6220-usb 20 - items: 21 - const: rockchip,rk3066-usb 22 - const: snps,dwc2 23 - items: 24 - enum: 25 - rockchip,px30-usb 26 - rockchip,rk3036-usb 27 - rockchip,rk3188-usb 28 - rockchip,rk3228-usb 29 - rockchip,rk3288-usb 30 - rockchip,rk3308-usb 31 - rockchip,rk3328-usb 32 - rockchip,rk3368-usb 33 - rockchip,rv1108-usb 34 - const: rockchip,rk3066-usb 35 - const: snps,dwc2 36 - const: lantiq,arx100-usb 37 - const: lantiq,xrx200-usb 38 - items: 39 - enum: 40 - amlogic,meson8-usb 41 - amlogic,meson8b-usb 42 - amlogic,meson-gxbb-usb 43 - amlogic,meson-g12a-usb 44 - const: snps,dwc2 45 - const: amcc,dwc-otg 46 - const: apm,apm82181-dwc-otg 47 - const: snps,dwc2 48 - const: st,stm32f4x9-fsotg 49 - const: st,stm32f4x9-hsotg 50 - const: st,stm32f7-hsotg 51 - const: st,stm32mp15-fsotg 52 - items: 53 - const: st,stm32mp15-hsotg 54 - const: snps,dwc2 55 - const: samsung,s3c6400-hsotg 56 57 reg: 58 maxItems: 1 59 60 interrupts: 61 maxItems: 1 62 63 clocks: 64 maxItems: 1 65 66 clock-names: 67 items: 68 - const: otg 69 70 resets: 71 items: 72 - description: common reset 73 - description: ecc reset 74 minItems: 1 75 76 reset-names: 77 items: 78 - const: dwc2 79 - const: dwc2-ecc 80 minItems: 1 81 82 phys: 83 maxItems: 1 84 85 phy-names: 86 const: usb2-phy 87 88 power-domains: 89 maxItems: 1 90 91 vbus-supply: 92 description: reference to the VBUS regulator. Depending on the current mode 93 this is enabled (in "host" mode") or disabled (in "peripheral" mode). The 94 regulator is updated if the controller is configured in "otg" mode and the 95 status changes between "host" and "peripheral". 96 97 vusb_d-supply: 98 description: phandle to voltage regulator of digital section, 99 100 vusb_a-supply: 101 description: phandle to voltage regulator of analog section. 102 103 usb33d-supply: 104 description: reference to the VBUS and ID sensing comparators supply, in 105 order to perform OTG operation, used on STM32MP15 SoCs. 106 107 dr_mode: true 108 109 otg-rev: true 110 111 hnp-disable: true 112 113 srp-disable: true 114 115 usb-role-switch: true 116 117 g-rx-fifo-size: 118 $ref: /schemas/types.yaml#/definitions/uint32 119 description: size of rx fifo size in gadget mode. 120 121 g-np-tx-fifo-size: 122 $ref: /schemas/types.yaml#/definitions/uint32 123 description: size of non-periodic tx fifo size in gadget mode. 124 125 g-tx-fifo-size: 126 $ref: /schemas/types.yaml#/definitions/uint32-array 127 description: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 128 129 snps,need-phy-for-wake: 130 $ref: /schemas/types.yaml#/definitions/flag 131 description: If present indicates that the phy needs to be left on for 132 remote wakeup during suspend. 133 134 snps,reset-phy-on-wake: 135 $ref: /schemas/types.yaml#/definitions/flag 136 description: If present indicates that we need to reset the PHY when we 137 detect a wakeup. This is due to a hardware errata. 138 139required: 140 - compatible 141 - reg 142 - interrupts 143 - clocks 144 - clock-names 145 146additionalProperties: false 147 148examples: 149 - | 150 usb@101c0000 { 151 compatible = "rockchip,rk3066-usb", "snps,dwc2"; 152 reg = <0x10180000 0x40000>; 153 interrupts = <18>; 154 clocks = <&usb_otg_ahb_clk>; 155 clock-names = "otg"; 156 phys = <&usbphy>; 157 phy-names = "usb2-phy"; 158 }; 159 160... 161