1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/dwc2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: DesignWare HS OTG USB 2.0 controller Bindings
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  compatible:
14    oneOf:
15      - const: brcm,bcm2835-usb
16      - const: hisilicon,hi6220-usb
17      - items:
18          - const: rockchip,rk3066-usb
19          - const: snps,dwc2
20      - items:
21          - enum:
22            - rockchip,px30-usb
23            - rockchip,rk3036-usb
24            - rockchip,rk3188-usb
25            - rockchip,rk3228-usb
26            - rockchip,rk3288-usb
27            - rockchip,rk3328-usb
28            - rockchip,rk3368-usb
29            - rockchip,rv1108-usb
30          - const: rockchip,rk3066-usb
31          - const: snps,dwc2
32      - const: lantiq,arx100-usb
33      - const: lantiq,xrx200-usb
34      - items:
35          - enum:
36            - amlogic,meson8-usb
37            - amlogic,meson8b-usb
38            - amlogic,meson-gxbb-usb
39            - amlogic,meson-g12a-usb
40          - const: snps,dwc2
41      - const: amcc,dwc-otg
42      - const: snps,dwc2
43      - const: st,stm32f4x9-fsotg
44      - const: st,stm32f4x9-hsotg
45      - const: st,stm32f7-hsotg
46      - const: st,stm32mp15-fsotg
47      - const: st,stm32mp15-hsotg
48      - const: samsung,s3c6400-hsotg
49
50  reg:
51    maxItems: 1
52
53  interrupts:
54    maxItems: 1
55
56  clocks:
57    maxItems: 1
58
59  clock-names:
60    items:
61      - const: otg
62
63  resets:
64    items:
65     - description: common reset
66     - description: ecc reset
67    minItems: 1
68
69  reset-names:
70    items:
71     - const: dwc2
72     - const: dwc2-ecc
73    minItems: 1
74
75  phys:
76    maxItems: 1
77
78  phy-names:
79    const: usb2-phy
80
81  vbus-supply:
82    description: reference to the VBUS regulator. Depending on the current mode
83      this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
84      regulator is updated if the controller is configured in "otg" mode and the
85      status changes between "host" and "peripheral".
86
87  vusb_d-supply:
88    description: phandle to voltage regulator of digital section,
89
90  vusb_a-supply:
91    description: phandle to voltage regulator of analog section.
92
93  vusb33d-supply:
94    description: reference to the VBUS and ID sensing comparators supply, in
95      order to perform OTG operation, used on STM32MP15 SoCs.
96
97  dr_mode:
98    enum: [host, peripheral, otg]
99
100  g-rx-fifo-size:
101    $ref: /schemas/types.yaml#/definitions/uint32
102    description: size of rx fifo size in gadget mode.
103
104  g-np-tx-fifo-size:
105    $ref: /schemas/types.yaml#/definitions/uint32
106    description: size of non-periodic tx fifo size in gadget mode.
107
108  g-tx-fifo-size:
109    $ref: /schemas/types.yaml#/definitions/uint32-array
110    description: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
111
112  snps,need-phy-for-wake:
113    $ref: /schemas/types.yaml#/definitions/flag
114    description: If present indicates that the phy needs to be left on for remote wakeup during suspend.
115
116  snps,reset-phy-on-wake:
117    $ref: /schemas/types.yaml#/definitions/flag
118    description: If present indicates that we need to reset the PHY when we detect a wakeup.
119                 This is due to a hardware errata.
120
121required:
122  - compatible
123  - reg
124  - interrupts
125  - clocks
126  - clock-names
127
128additionalProperties: false
129
130examples:
131  - |
132      usb@101c0000 {
133        compatible = "rockchip,rk3066-usb", "snps,dwc2";
134        reg = <0x10180000 0x40000>;
135        interrupts = <18>;
136        clocks = <&usb_otg_ahb_clk>;
137        clock-names = "otg";
138        phys = <&usbphy>;
139        phy-names = "usb2-phy";
140      };
141
142...
143