1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2019 BayLibre, SAS 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Amlogic Meson G12A DWC3 USB SoC Controller Glue 9 10maintainers: 11 - Neil Armstrong <narmstrong@baylibre.com> 12 13description: | 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 16 only. 17 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 19 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 21 22 The DWC3 Glue controls the PHY routing and power, an interrupt line is 23 connected to the Glue to serve as OTG ID change detection. 24 25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in 26 host-only mode. 27 28properties: 29 compatible: 30 enum: 31 - amlogic,meson-g12a-usb-ctrl 32 - amlogic,meson-a1-usb-ctrl 33 34 ranges: true 35 36 "#address-cells": 37 enum: [ 1, 2 ] 38 39 "#size-cells": 40 enum: [ 1, 2 ] 41 42 clocks: 43 minItems: 1 44 45 resets: 46 minItems: 1 47 48 reg: 49 maxItems: 1 50 51 interrupts: 52 maxItems: 1 53 54 phy-names: 55 items: 56 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 57 - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 58 - const: usb3-phy0 # USB3 PHY if USB3_0 is used 59 60 phys: 61 minItems: 1 62 maxItems: 3 63 64 dr_mode: true 65 66 power-domains: 67 maxItems: 1 68 69 vbus-supply: 70 description: VBUS power supply when used in OTG switchable mode 71 72patternProperties: 73 "^usb@[0-9a-f]+$": 74 type: object 75 76additionalProperties: false 77 78required: 79 - compatible 80 - "#address-cells" 81 - "#size-cells" 82 - ranges 83 - clocks 84 - resets 85 - reg 86 - interrupts 87 - phy-names 88 - phys 89 - dr_mode 90 91allOf: 92 - if: 93 properties: 94 compatible: 95 enum: 96 - amlogic,meson-a1-usb-ctrl 97 98 then: 99 properties: 100 clocks: 101 minItems: 3 102 clock-names: 103 items: 104 - const: usb_ctrl 105 - const: usb_bus 106 - const: xtal_usb_ctrl 107 required: 108 - clock-names 109 110examples: 111 - | 112 usb: usb@ffe09000 { 113 compatible = "amlogic,meson-g12a-usb-ctrl"; 114 reg = <0x0 0xffe09000 0x0 0xa0>; 115 interrupts = <16>; 116 #address-cells = <1>; 117 #size-cells = <1>; 118 ranges; 119 120 clocks = <&clkc_usb>; 121 resets = <&reset_usb>; 122 123 dr_mode = "otg"; 124 125 phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>; 126 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; 127 128 dwc2: usb@ff400000 { 129 compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 130 reg = <0xff400000 0x40000>; 131 interrupts = <31>; 132 clocks = <&clkc_usb1>; 133 clock-names = "otg"; 134 phys = <&usb2_phy1>; 135 dr_mode = "peripheral"; 136 g-rx-fifo-size = <192>; 137 g-np-tx-fifo-size = <128>; 138 g-tx-fifo-size = <128 128 16 16 16>; 139 }; 140 141 dwc3: usb@ff500000 { 142 compatible = "snps,dwc3"; 143 reg = <0xff500000 0x100000>; 144 interrupts = <30>; 145 dr_mode = "host"; 146 snps,dis_u2_susphy_quirk; 147 snps,quirk-frame-length-adjustment; 148 }; 149 }; 150 151