1*7522c08dSYoshihiro Shimoda# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*7522c08dSYoshihiro Shimoda%YAML 1.2 3*7522c08dSYoshihiro Shimoda--- 4*7522c08dSYoshihiro Shimoda$id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml# 5*7522c08dSYoshihiro Shimoda$schema: http://devicetree.org/meta-schemas/core.yaml# 6*7522c08dSYoshihiro Shimoda 7*7522c08dSYoshihiro Shimodatitle: Renesas R-Car UFS Host Controller 8*7522c08dSYoshihiro Shimoda 9*7522c08dSYoshihiro Shimodamaintainers: 10*7522c08dSYoshihiro Shimoda - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 11*7522c08dSYoshihiro Shimoda 12*7522c08dSYoshihiro ShimodaallOf: 13*7522c08dSYoshihiro Shimoda - $ref: ufs-common.yaml 14*7522c08dSYoshihiro Shimoda 15*7522c08dSYoshihiro Shimodaproperties: 16*7522c08dSYoshihiro Shimoda compatible: 17*7522c08dSYoshihiro Shimoda const: renesas,r8a779f0-ufs 18*7522c08dSYoshihiro Shimoda 19*7522c08dSYoshihiro Shimoda reg: 20*7522c08dSYoshihiro Shimoda maxItems: 1 21*7522c08dSYoshihiro Shimoda 22*7522c08dSYoshihiro Shimoda clocks: 23*7522c08dSYoshihiro Shimoda maxItems: 2 24*7522c08dSYoshihiro Shimoda 25*7522c08dSYoshihiro Shimoda clock-names: 26*7522c08dSYoshihiro Shimoda items: 27*7522c08dSYoshihiro Shimoda - const: fck 28*7522c08dSYoshihiro Shimoda - const: ref_clk 29*7522c08dSYoshihiro Shimoda 30*7522c08dSYoshihiro Shimoda power-domains: 31*7522c08dSYoshihiro Shimoda maxItems: 1 32*7522c08dSYoshihiro Shimoda 33*7522c08dSYoshihiro Shimoda resets: 34*7522c08dSYoshihiro Shimoda maxItems: 1 35*7522c08dSYoshihiro Shimoda 36*7522c08dSYoshihiro Shimodarequired: 37*7522c08dSYoshihiro Shimoda - compatible 38*7522c08dSYoshihiro Shimoda - reg 39*7522c08dSYoshihiro Shimoda - clocks 40*7522c08dSYoshihiro Shimoda - clock-names 41*7522c08dSYoshihiro Shimoda - power-domains 42*7522c08dSYoshihiro Shimoda - resets 43*7522c08dSYoshihiro Shimoda 44*7522c08dSYoshihiro ShimodaunevaluatedProperties: false 45*7522c08dSYoshihiro Shimoda 46*7522c08dSYoshihiro Shimodaexamples: 47*7522c08dSYoshihiro Shimoda - | 48*7522c08dSYoshihiro Shimoda #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 49*7522c08dSYoshihiro Shimoda #include <dt-bindings/interrupt-controller/arm-gic.h> 50*7522c08dSYoshihiro Shimoda #include <dt-bindings/power/r8a779f0-sysc.h> 51*7522c08dSYoshihiro Shimoda 52*7522c08dSYoshihiro Shimoda ufs: ufs@e686000 { 53*7522c08dSYoshihiro Shimoda compatible = "renesas,r8a779f0-ufs"; 54*7522c08dSYoshihiro Shimoda reg = <0xe6860000 0x100>; 55*7522c08dSYoshihiro Shimoda interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; 56*7522c08dSYoshihiro Shimoda clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; 57*7522c08dSYoshihiro Shimoda clock-names = "fck", "ref_clk"; 58*7522c08dSYoshihiro Shimoda freq-table-hz = <200000000 200000000>, <38400000 38400000>; 59*7522c08dSYoshihiro Shimoda power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 60*7522c08dSYoshihiro Shimoda resets = <&cpg 1514>; 61*7522c08dSYoshihiro Shimoda }; 62