12e876b5dSRyder LeeMediaTek Timers 259311b19SStanley Chu--------------- 359311b19SStanley Chu 42e876b5dSRyder LeeMediaTek SoCs have two different timers on different platforms, 559311b19SStanley Chu- GPT (General Purpose Timer) 659311b19SStanley Chu- SYST (System Timer) 759311b19SStanley Chu 859311b19SStanley ChuThe proper timer will be selected automatically by driver. 998c6bf2aSMatthias Brugger 1098c6bf2aSMatthias BruggerRequired properties: 1169a462b9SMars Cheng- compatible should contain: 122e876b5dSRyder Lee For those SoCs that use GPT 1359311b19SStanley Chu * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT) 1459311b19SStanley Chu * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT) 1559311b19SStanley Chu * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT) 1659311b19SStanley Chu * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT) 1759311b19SStanley Chu * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT) 1859311b19SStanley Chu * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT) 1959311b19SStanley Chu * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT) 20ef038a55SFabien Parent * "mediatek,mt8516-timer" for MT8516 compatible timers (GPT) 2159311b19SStanley Chu * "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT) 222e876b5dSRyder Lee 232e876b5dSRyder Lee For those SoCs that use SYST 24d14e0fe3SDehui Sun * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) 25377c0d7eSSeiya Wang * "mediatek,mt8192-timer" for MT8192 compatible timers (SYST) 262e876b5dSRyder Lee * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) 272e876b5dSRyder Lee * "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST) 282e876b5dSRyder Lee 2959311b19SStanley Chu- reg: Should contain location and length for timer register. 3059311b19SStanley Chu- clocks: Should contain system clock. 3198c6bf2aSMatthias Brugger 3298c6bf2aSMatthias BruggerExamples: 3398c6bf2aSMatthias Brugger 3498c6bf2aSMatthias Brugger timer@10008000 { 3598c6bf2aSMatthias Brugger compatible = "mediatek,mt6577-timer"; 3698c6bf2aSMatthias Brugger reg = <0x10008000 0x80>; 3798c6bf2aSMatthias Brugger interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>; 3859311b19SStanley Chu clocks = <&system_clk>; 3998c6bf2aSMatthias Brugger }; 40