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2C-SKY Multi-processors Timer
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4
5C-SKY multi-processors timer is designed for C-SKY SMP system and the
6regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
7
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR  "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR  "cr<6, 14>" Window value reg to triger next event.
12
13==============================
14timer node bindings definition
15==============================
16
17	Description: Describes SMP timer
18
19	PROPERTIES
20
21	- compatible
22		Usage: required
23		Value type: <string>
24		Definition: must be "csky,mptimer"
25	- clocks
26		Usage: required
27		Value type: <node>
28		Definition: must be input clk node
29	- interrupts
30		Usage: required
31		Value type: <u32>
32		Definition: must be timer irq num defined by soc
33
34Examples:
35---------
36
37	timer: timer {
38		compatible = "csky,mptimer";
39		clocks = <&dummy_apb_clk>;
40		interrupts = <16>;
41		interrupt-parent = <&intc>;
42	};
43