1abf8422cSNobuhiro Iwamatsu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2abf8422cSNobuhiro Iwamatsu%YAML 1.2
3abf8422cSNobuhiro Iwamatsu---
4abf8422cSNobuhiro Iwamatsu$id: http://devicetree.org/schemas/timer/cdns,ttc.yaml#
5abf8422cSNobuhiro Iwamatsu$schema: http://devicetree.org/meta-schemas/core.yaml#
6abf8422cSNobuhiro Iwamatsu
7abf8422cSNobuhiro Iwamatsutitle: Cadence TTC - Triple Timer Counter
8abf8422cSNobuhiro Iwamatsu
9abf8422cSNobuhiro Iwamatsumaintainers:
10abf8422cSNobuhiro Iwamatsu  - Michal Simek <michal.simek@xilinx.com>
11abf8422cSNobuhiro Iwamatsu
12abf8422cSNobuhiro Iwamatsuproperties:
13abf8422cSNobuhiro Iwamatsu  compatible:
14abf8422cSNobuhiro Iwamatsu    const: cdns,ttc
15abf8422cSNobuhiro Iwamatsu
16abf8422cSNobuhiro Iwamatsu  reg:
17abf8422cSNobuhiro Iwamatsu    maxItems: 1
18abf8422cSNobuhiro Iwamatsu
19abf8422cSNobuhiro Iwamatsu  interrupts:
20abf8422cSNobuhiro Iwamatsu    maxItems: 3
21abf8422cSNobuhiro Iwamatsu    description: |
22abf8422cSNobuhiro Iwamatsu      A list of 3 interrupts; one per timer channel.
23abf8422cSNobuhiro Iwamatsu
24abf8422cSNobuhiro Iwamatsu  clocks:
25abf8422cSNobuhiro Iwamatsu    maxItems: 1
26abf8422cSNobuhiro Iwamatsu
27557804a8SMichal Simek  power-domains:
28557804a8SMichal Simek    maxItems: 1
29557804a8SMichal Simek
30abf8422cSNobuhiro Iwamatsu  timer-width:
31*975b1e50SRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
32abf8422cSNobuhiro Iwamatsu    description: |
33abf8422cSNobuhiro Iwamatsu      Bit width of the timer, necessary if not 16.
34abf8422cSNobuhiro Iwamatsu
35abf8422cSNobuhiro Iwamatsurequired:
36abf8422cSNobuhiro Iwamatsu  - compatible
37abf8422cSNobuhiro Iwamatsu  - reg
38abf8422cSNobuhiro Iwamatsu  - interrupts
39abf8422cSNobuhiro Iwamatsu  - clocks
40abf8422cSNobuhiro Iwamatsu
415be478f9SRob HerringadditionalProperties: false
425be478f9SRob Herring
43abf8422cSNobuhiro Iwamatsuexamples:
44abf8422cSNobuhiro Iwamatsu  - |
45abf8422cSNobuhiro Iwamatsu    ttc0: ttc0@f8001000 {
46abf8422cSNobuhiro Iwamatsu        interrupt-parent = <&intc>;
47abf8422cSNobuhiro Iwamatsu        interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
48abf8422cSNobuhiro Iwamatsu        compatible = "cdns,ttc";
49abf8422cSNobuhiro Iwamatsu        reg = <0xF8001000 0x1000>;
50abf8422cSNobuhiro Iwamatsu        clocks = <&cpu_clk 3>;
51abf8422cSNobuhiro Iwamatsu        timer-width = <32>;
52abf8422cSNobuhiro Iwamatsu    };
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