1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2020 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Thermal idle cooling device binding
9
10maintainers:
11  - Daniel Lezcano <daniel.lezcano@linaro.org>
12
13description: |
14  The thermal idle cooling device allows the system to passively
15  mitigate the temperature on the device by injecting idle cycles,
16  forcing it to cool down.
17
18  This binding describes the thermal idle node.
19
20properties:
21   $nodename:
22     const: thermal-idle
23     description: |
24        A thermal-idle node describes the idle cooling device properties to
25        cool down efficiently the attached thermal zone.
26
27   '#cooling-cells':
28      const: 2
29      description: |
30         Must be 2, in order to specify minimum and maximum cooling state used in
31         the cooling-maps reference. The first cell is the minimum cooling state
32         and the second cell is the maximum cooling state requested.
33
34   duration-us:
35      description: |
36         The idle duration in microsecond the device should cool down.
37
38   exit-latency-us:
39      description: |
40         The exit latency constraint in microsecond for the injected
41         idle state for the device. It is the latency constraint to
42         apply when selecting an idle state from among all the present
43         ones.
44
45required:
46  - '#cooling-cells'
47
48examples:
49  - |
50    #include <dt-bindings/thermal/thermal.h>
51
52    // Example: Combining idle cooling device on big CPUs with cpufreq cooling device
53    cpus {
54            #address-cells = <2>;
55            #size-cells = <0>;
56
57            /* ... */
58
59                 cpu_b0: cpu@100 {
60                         device_type = "cpu";
61                         compatible = "arm,cortex-a72";
62                         reg = <0x0 0x100>;
63                         enable-method = "psci";
64                         capacity-dmips-mhz = <1024>;
65                         dynamic-power-coefficient = <436>;
66                         #cooling-cells = <2>; /* min followed by max */
67                         cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
68                         thermal-idle {
69                                 #cooling-cells = <2>;
70                                 duration-us = <10000>;
71                                 exit-latency-us = <500>;
72                         };
73                };
74
75                cpu_b1: cpu@101 {
76                        device_type = "cpu";
77                        compatible = "arm,cortex-a72";
78                        reg = <0x0 0x101>;
79                        enable-method = "psci";
80                        capacity-dmips-mhz = <1024>;
81                        dynamic-power-coefficient = <436>;
82                        #cooling-cells = <2>; /* min followed by max */
83                        cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
84                        thermal-idle {
85                                #cooling-cells = <2>;
86                                duration-us = <10000>;
87                                exit-latency-us = <500>;
88                        };
89                 };
90
91          /* ... */
92
93    };
94
95    /* ... */
96
97    thermal_zones {
98         cpu_thermal: cpu {
99                polling-delay-passive = <100>;
100                polling-delay = <1000>;
101
102                /* ... */
103
104                trips {
105                        cpu_alert0: cpu_alert0 {
106                                    temperature = <65000>;
107                                    hysteresis = <2000>;
108                                    type = "passive";
109                        };
110
111                        cpu_alert1: cpu_alert1 {
112                                    temperature = <70000>;
113                                    hysteresis = <2000>;
114                                    type = "passive";
115                        };
116
117                        cpu_alert2: cpu_alert2 {
118                                    temperature = <75000>;
119                                    hysteresis = <2000>;
120                                    type = "passive";
121                        };
122
123                        cpu_crit: cpu_crit {
124                                    temperature = <95000>;
125                                    hysteresis = <2000>;
126                                    type = "critical";
127                        };
128                };
129
130                cooling-maps {
131                        map0 {
132                             trip = <&cpu_alert1>;
133                             cooling-device = <&{/cpus/cpu@100/thermal-idle} 0 15 >,
134                                              <&{/cpus/cpu@101/thermal-idle} 0 15>;
135                        };
136
137                        map1 {
138                             trip = <&cpu_alert2>;
139                             cooling-device =
140                                        <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
141                                        <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
142                       };
143                };
144          };
145    };
146