1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    enum:
15      - rockchip,px30-tsadc # PX30 SoCs
16      - rockchip,rv1108-tsadc # RV1108 SoCs
17      - rockchip,rk3228-tsadc # RK3228 SoCs
18      - rockchip,rk3288-tsadc # RK3288 SoCs
19      - rockchip,rk3328-tsadc # RK3328 SoCs
20      - rockchip,rk3368-tsadc # RK3368 SoCs
21      - rockchip,rk3399-tsadc # RK3399 SoCs
22      - rockchip,rk3568-tsadc # RK3568 SoCs
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    minItems: 2
32    maxItems: 2
33
34  clock-names:
35    items:
36      - const: tsadc
37      - const: apb_pclk
38
39  resets:
40    maxItems: 1
41
42  reset-names:
43    items:
44      - const: tsadc-apb
45
46  "#thermal-sensor-cells":
47    const: 1
48
49  rockchip,grf:
50    description: The phandle of the syscon node for the general register file.
51    $ref: /schemas/types.yaml#/definitions/phandle
52
53  rockchip,hw-tshut-temp:
54    description: The hardware-controlled shutdown temperature value.
55    $ref: /schemas/types.yaml#/definitions/uint32
56
57  rockchip,hw-tshut-mode:
58    description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
59    $ref: /schemas/types.yaml#/definitions/uint32
60    enum: [0, 1]
61
62  rockchip,hw-tshut-polarity:
63    description: The hardware-controlled active polarity 0:LOW 1:HIGH.
64    $ref: /schemas/types.yaml#/definitions/uint32
65    enum: [0, 1]
66
67required:
68  - compatible
69  - reg
70  - interrupts
71  - clocks
72  - clock-names
73  - resets
74  - reset-names
75  - "#thermal-sensor-cells"
76
77additionalProperties: false
78
79examples:
80  - |
81    #include <dt-bindings/interrupt-controller/arm-gic.h>
82    #include <dt-bindings/clock/rk3288-cru.h>
83
84    tsadc: tsadc@ff280000 {
85        compatible = "rockchip,rk3288-tsadc";
86        reg = <0xff280000 0x100>;
87        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
88        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
89        clock-names = "tsadc", "apb_pclk";
90        resets = <&cru SRST_TSADC>;
91        reset-names = "tsadc-apb";
92        #thermal-sensor-cells = <1>;
93        rockchip,hw-tshut-temp = <95000>;
94        rockchip,hw-tshut-mode = <0>;
95        rockchip,hw-tshut-polarity = <0>;
96    };
97