10284b52eSThara Gopinath# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 20284b52eSThara Gopinath# Copyright 2021 Linaro Ltd. 30284b52eSThara Gopinath%YAML 1.2 40284b52eSThara Gopinath--- 50284b52eSThara Gopinath$id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml# 60284b52eSThara Gopinath$schema: http://devicetree.org/meta-schemas/core.yaml# 70284b52eSThara Gopinath 80284b52eSThara Gopinathtitle: Qualcomm Limits Management Hardware(LMh) 90284b52eSThara Gopinath 100284b52eSThara Gopinathmaintainers: 11*c7e151a7SDavid Heidelberg - Thara Gopinath <thara.gopinath@gmail.com> 120284b52eSThara Gopinath 130284b52eSThara Gopinathdescription: 140284b52eSThara Gopinath Limits Management Hardware(LMh) is a hardware infrastructure on some 150284b52eSThara Gopinath Qualcomm SoCs that can enforce temperature and current limits as 160284b52eSThara Gopinath programmed by software for certain IPs like CPU. 170284b52eSThara Gopinath 180284b52eSThara Gopinathproperties: 190284b52eSThara Gopinath compatible: 200284b52eSThara Gopinath enum: 21b54d4dafSBjorn Andersson - qcom,sc8180x-lmh 220284b52eSThara Gopinath - qcom,sdm845-lmh 231f43fad1SThara Gopinath - qcom,sm8150-lmh 240284b52eSThara Gopinath 250284b52eSThara Gopinath reg: 260284b52eSThara Gopinath items: 270284b52eSThara Gopinath - description: core registers 280284b52eSThara Gopinath 290284b52eSThara Gopinath interrupts: 300284b52eSThara Gopinath maxItems: 1 310284b52eSThara Gopinath 320284b52eSThara Gopinath '#interrupt-cells': 330284b52eSThara Gopinath const: 1 340284b52eSThara Gopinath 350284b52eSThara Gopinath interrupt-controller: true 360284b52eSThara Gopinath 370284b52eSThara Gopinath cpus: 380284b52eSThara Gopinath description: 390284b52eSThara Gopinath phandle of the first cpu in the LMh cluster 403c75ce7cSRob Herring maxItems: 1 410284b52eSThara Gopinath 420284b52eSThara Gopinath qcom,lmh-temp-arm-millicelsius: 430284b52eSThara Gopinath description: 440284b52eSThara Gopinath An integer expressing temperature threshold at which the LMh thermal 450284b52eSThara Gopinath FSM is engaged. 460284b52eSThara Gopinath 470284b52eSThara Gopinath qcom,lmh-temp-low-millicelsius: 480284b52eSThara Gopinath description: 490284b52eSThara Gopinath An integer expressing temperature threshold at which the state machine 500284b52eSThara Gopinath will attempt to remove frequency throttling. 510284b52eSThara Gopinath 520284b52eSThara Gopinath qcom,lmh-temp-high-millicelsius: 530284b52eSThara Gopinath description: 540284b52eSThara Gopinath An integer expressing temperature threshold at which the state machine 550284b52eSThara Gopinath will attempt to throttle the frequency. 560284b52eSThara Gopinath 570284b52eSThara Gopinathrequired: 580284b52eSThara Gopinath - compatible 590284b52eSThara Gopinath - reg 600284b52eSThara Gopinath - interrupts 610284b52eSThara Gopinath - '#interrupt-cells' 620284b52eSThara Gopinath - interrupt-controller 630284b52eSThara Gopinath - cpus 640284b52eSThara Gopinath - qcom,lmh-temp-arm-millicelsius 650284b52eSThara Gopinath - qcom,lmh-temp-low-millicelsius 660284b52eSThara Gopinath - qcom,lmh-temp-high-millicelsius 670284b52eSThara Gopinath 680284b52eSThara GopinathadditionalProperties: false 690284b52eSThara Gopinath 700284b52eSThara Gopinathexamples: 710284b52eSThara Gopinath - | 720284b52eSThara Gopinath #include <dt-bindings/interrupt-controller/arm-gic.h> 730284b52eSThara Gopinath 740284b52eSThara Gopinath lmh@17d70800 { 750284b52eSThara Gopinath compatible = "qcom,sdm845-lmh"; 760284b52eSThara Gopinath reg = <0x17d70800 0x400>; 770284b52eSThara Gopinath interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 780284b52eSThara Gopinath cpus = <&CPU4>; 790284b52eSThara Gopinath qcom,lmh-temp-arm-millicelsius = <65000>; 800284b52eSThara Gopinath qcom,lmh-temp-low-millicelsius = <94500>; 810284b52eSThara Gopinath qcom,lmh-temp-high-millicelsius = <95000>; 820284b52eSThara Gopinath interrupt-controller; 830284b52eSThara Gopinath #interrupt-cells = <1>; 840284b52eSThara Gopinath }; 85