1* Mediatek Thermal
2
3This describes the device tree binding for the Mediatek thermal controller
4which measures the on-SoC temperatures. This device does not have its own ADC,
5instead it directly controls the AUXADC via AHB bus accesses. For this reason
6this device needs phandles to the AUXADC. Also it controls a mux in the
7apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
8is also needed.
9
10Required properties:
11- compatible:
12  - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
13  - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
14  - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
15- reg: Address range of the thermal controller
16- interrupts: IRQ for the thermal controller
17- clocks, clock-names: Clocks needed for the thermal controller. required
18                       clocks are:
19		       "therm":	 Main clock needed for register access
20		       "auxadc": The AUXADC clock
21- resets: Reference to the reset controller controlling the thermal controller.
22- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
23- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
24- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
25
26Optional properties:
27- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
28               unspecified default values shall be used.
29- nvmem-cell-names: Should be "calibration-data"
30
31Example:
32
33	thermal: thermal@1100b000 {
34		#thermal-sensor-cells = <1>;
35		compatible = "mediatek,mt8173-thermal";
36		reg = <0 0x1100b000 0 0x1000>;
37		interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
38		clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
39		clock-names = "therm", "auxadc";
40		resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
41		reset-names = "therm";
42		mediatek,auxadc = <&auxadc>;
43		mediatek,apmixedsys = <&apmixedsys>;
44		nvmem-cells = <&thermal_calibration_data>;
45		nvmem-cell-names = "calibration-data";
46	};
47