1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 SPI Controller
8
9description: |
10  The STM32 SPI controller is used to communicate with external devices using
11  the Serial Peripheral Interface. It supports full-duplex, half-duplex and
12  simplex synchronous serial communication with external devices. It supports
13  from 4 to 32-bit data size.
14
15maintainers:
16  - Erwan Leray <erwan.leray@foss.st.com>
17  - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
18
19allOf:
20  - $ref: spi-controller.yaml#
21  - if:
22      properties:
23        compatible:
24          contains:
25            const: st,stm32f4-spi
26
27    then:
28      properties:
29        st,spi-midi-ns: false
30
31properties:
32  compatible:
33    enum:
34      - st,stm32f4-spi
35      - st,stm32h7-spi
36
37  reg:
38    maxItems: 1
39
40  clocks:
41    maxItems: 1
42
43  interrupts:
44    maxItems: 1
45
46  resets:
47    maxItems: 1
48
49  dmas:
50    description: |
51      DMA specifiers for tx and rx dma. DMA fifo mode must be used. See
52      the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml.
53    items:
54      - description: rx DMA channel
55      - description: tx DMA channel
56
57  dma-names:
58    items:
59      - const: rx
60      - const: tx
61
62patternProperties:
63  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
64    type: object
65    # SPI slave nodes must be children of the SPI master node and can
66    # contain the following properties.
67    properties:
68      st,spi-midi-ns:
69        description: |
70          Only for STM32H7, (Master Inter-Data Idleness) minimum time
71          delay in nanoseconds inserted between two consecutive data frames.
72
73required:
74  - compatible
75  - reg
76  - clocks
77  - interrupts
78
79unevaluatedProperties: false
80
81examples:
82  - |
83    #include <dt-bindings/interrupt-controller/arm-gic.h>
84    #include <dt-bindings/clock/stm32mp1-clks.h>
85    #include <dt-bindings/reset/stm32mp1-resets.h>
86    spi@4000b000 {
87        #address-cells = <1>;
88        #size-cells = <0>;
89        compatible = "st,stm32h7-spi";
90        reg = <0x4000b000 0x400>;
91        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
92        clocks = <&rcc SPI2_K>;
93        resets = <&rcc SPI2_R>;
94        dmas = <&dmamux1 0 39 0x400 0x05>,
95               <&dmamux1 1 40 0x400 0x05>;
96        dma-names = "rx", "tx";
97        cs-gpios = <&gpioa 11 0>;
98    };
99
100...
101