10a4afaaeSPurna Chandra MandalMicrochip PIC32 Quad SPI controller 20a4afaaeSPurna Chandra Mandal----------------------------------- 30a4afaaeSPurna Chandra MandalRequired properties: 40a4afaaeSPurna Chandra Mandal- compatible: Should be "microchip,pic32mzda-sqi". 50a4afaaeSPurna Chandra Mandal- reg: Address and length of SQI controller register space. 60a4afaaeSPurna Chandra Mandal- interrupts: Should contain SQI interrupt. 70a4afaaeSPurna Chandra Mandal- clocks: Should contain phandle of two clocks in sequence, one that drives 80a4afaaeSPurna Chandra Mandal clock on SPI bus and other that drives SQI controller. 90a4afaaeSPurna Chandra Mandal- clock-names: Should be "spi_ck" and "reg_ck" in order. 100a4afaaeSPurna Chandra Mandal 110a4afaaeSPurna Chandra MandalExample: 120a4afaaeSPurna Chandra Mandal sqi1: spi@1f8e2000 { 130a4afaaeSPurna Chandra Mandal compatible = "microchip,pic32mzda-sqi"; 140a4afaaeSPurna Chandra Mandal reg = <0x1f8e2000 0x200>; 150a4afaaeSPurna Chandra Mandal clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>; 160a4afaaeSPurna Chandra Mandal clock-names = "spi_ck", "reg_ck"; 170a4afaaeSPurna Chandra Mandal interrupts = <169 IRQ_TYPE_LEVEL_HIGH>; 180a4afaaeSPurna Chandra Mandal }; 19