1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-xilinx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Xilinx SPI controller Device Tree Bindings
8
9maintainers:
10  - Michal Simek <michal.simek@xilinx.com>
11
12allOf:
13  - $ref: "spi-controller.yaml#"
14
15properties:
16  compatible:
17    enum:
18      - xlnx,xps-spi-2.00.a
19      - xlnx,xps-spi-2.00.b
20      - xlnx,axi-quad-spi-1.00.a
21
22  reg:
23    maxItems: 1
24
25  interrupts:
26    maxItems: 1
27
28  xlnx,num-ss-bits:
29    description: Number of chip selects used.
30    $ref: /schemas/types.yaml#/definitions/uint32
31    minimum: 1
32    maximum: 32
33
34  xlnx,num-transfer-bits:
35    description: Number of bits per transfer. This will be 8 if not specified.
36    $ref: /schemas/types.yaml#/definitions/uint32
37    enum: [8, 16, 32]
38    default: 8
39
40required:
41  - compatible
42  - reg
43  - interrupts
44
45unevaluatedProperties: false
46
47examples:
48  - |
49    spi0: spi@41e00000 {
50      compatible = "xlnx,xps-spi-2.00.a";
51      interrupt-parent = <&intc>;
52      interrupts = <0 31 1>;
53      reg = <0x41e00000 0x10000>;
54      xlnx,num-ss-bits = <0x1>;
55      xlnx,num-transfer-bits = <32>;
56    };
57...
58