19c12e34aSPragnesh Patel# SPDX-License-Identifier: GPL-2.0 29c12e34aSPragnesh Patel%YAML 1.2 39c12e34aSPragnesh Patel--- 49c12e34aSPragnesh Patel$id: http://devicetree.org/schemas/spi/spi-sifive.yaml# 59c12e34aSPragnesh Patel$schema: http://devicetree.org/meta-schemas/core.yaml# 69c12e34aSPragnesh Patel 79c12e34aSPragnesh Pateltitle: SiFive SPI controller 89c12e34aSPragnesh Patel 99c12e34aSPragnesh Patelmaintainers: 109c12e34aSPragnesh Patel - Pragnesh Patel <pragnesh.patel@sifive.com> 119c12e34aSPragnesh Patel - Paul Walmsley <paul.walmsley@sifive.com> 129c12e34aSPragnesh Patel - Palmer Dabbelt <palmer@sifive.com> 139c12e34aSPragnesh Patel 149c12e34aSPragnesh PatelallOf: 159c12e34aSPragnesh Patel - $ref: "spi-controller.yaml#" 169c12e34aSPragnesh Patel 179c12e34aSPragnesh Patelproperties: 189c12e34aSPragnesh Patel compatible: 199c12e34aSPragnesh Patel items: 209c12e34aSPragnesh Patel - const: sifive,fu540-c000-spi 219c12e34aSPragnesh Patel - const: sifive,spi0 229c12e34aSPragnesh Patel 239c12e34aSPragnesh Patel description: 249c12e34aSPragnesh Patel Should be "sifive,<chip>-spi" and "sifive,spi<version>". 259c12e34aSPragnesh Patel Supported compatible strings are - 269c12e34aSPragnesh Patel "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated 279c12e34aSPragnesh Patel onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive 289c12e34aSPragnesh Patel SPI v0 IP block with no chip integration tweaks. 299c12e34aSPragnesh Patel Please refer to sifive-blocks-ip-versioning.txt for details 309c12e34aSPragnesh Patel 319c12e34aSPragnesh Patel SPI RTL that corresponds to the IP block version numbers can be found here - 329c12e34aSPragnesh Patel https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi 339c12e34aSPragnesh Patel 349c12e34aSPragnesh Patel reg: 35e2f233ecSRob Herring minItems: 1 36e2f233ecSRob Herring items: 37e2f233ecSRob Herring - description: SPI registers region 38e2f233ecSRob Herring - description: Memory mapped flash region 399c12e34aSPragnesh Patel 409c12e34aSPragnesh Patel interrupts: 419c12e34aSPragnesh Patel maxItems: 1 429c12e34aSPragnesh Patel 439c12e34aSPragnesh Patel clocks: 449c12e34aSPragnesh Patel maxItems: 1 459c12e34aSPragnesh Patel 469c12e34aSPragnesh Patel description: 479c12e34aSPragnesh Patel Must reference the frequency given to the controller 489c12e34aSPragnesh Patel 499c12e34aSPragnesh Patel sifive,fifo-depth: 509c12e34aSPragnesh Patel description: 519c12e34aSPragnesh Patel Depth of hardware queues; defaults to 8 523d21a460SRob Herring $ref: "/schemas/types.yaml#/definitions/uint32" 533d21a460SRob Herring enum: [8] 543d21a460SRob Herring default: 8 559c12e34aSPragnesh Patel 569c12e34aSPragnesh Patel sifive,max-bits-per-word: 579c12e34aSPragnesh Patel description: 589c12e34aSPragnesh Patel Maximum bits per word; defaults to 8 593d21a460SRob Herring $ref: "/schemas/types.yaml#/definitions/uint32" 603d21a460SRob Herring enum: [0, 1, 2, 3, 4, 5, 6, 7, 8] 613d21a460SRob Herring default: 8 629c12e34aSPragnesh Patel 639c12e34aSPragnesh Patelrequired: 649c12e34aSPragnesh Patel - compatible 659c12e34aSPragnesh Patel - reg 669c12e34aSPragnesh Patel - interrupts 679c12e34aSPragnesh Patel - clocks 689c12e34aSPragnesh Patel 699c12e34aSPragnesh Patelexamples: 709c12e34aSPragnesh Patel - | 719c12e34aSPragnesh Patel spi: spi@10040000 { 729c12e34aSPragnesh Patel compatible = "sifive,fu540-c000-spi", "sifive,spi0"; 739c12e34aSPragnesh Patel reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>; 749c12e34aSPragnesh Patel interrupt-parent = <&plic>; 759c12e34aSPragnesh Patel interrupts = <51>; 769c12e34aSPragnesh Patel clocks = <&tlclk>; 779c12e34aSPragnesh Patel #address-cells = <1>; 789c12e34aSPragnesh Patel #size-cells = <0>; 799c12e34aSPragnesh Patel sifive,fifo-depth = <8>; 809c12e34aSPragnesh Patel sifive,max-bits-per-word = <8>; 819c12e34aSPragnesh Patel }; 829c12e34aSPragnesh Patel 839c12e34aSPragnesh Patel... 84