1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip SPI Controller 8 9description: 10 The Rockchip SPI controller is used to interface with various devices such 11 as flash and display controllers using the SPI communication interface. 12 13allOf: 14 - $ref: "spi-controller.yaml#" 15 16maintainers: 17 - Heiko Stuebner <heiko@sntech.de> 18 19# Everything else is described in the common file 20properties: 21 compatible: 22 oneOf: 23 - const: rockchip,rk3036-spi 24 - const: rockchip,rk3066-spi 25 - const: rockchip,rk3228-spi 26 - const: rockchip,rv1108-spi 27 - items: 28 - enum: 29 - rockchip,px30-spi 30 - rockchip,rk3188-spi 31 - rockchip,rk3288-spi 32 - rockchip,rk3308-spi 33 - rockchip,rk3328-spi 34 - rockchip,rk3368-spi 35 - rockchip,rk3399-spi 36 - const: rockchip,rk3066-spi 37 38 reg: 39 maxItems: 1 40 41 interrupts: 42 maxItems: 1 43 44 clocks: 45 items: 46 - description: transfer-clock 47 - description: peripheral clock 48 49 clock-names: 50 items: 51 - const: spiclk 52 - const: apb_pclk 53 54 dmas: 55 items: 56 - description: TX DMA Channel 57 - description: RX DMA Channel 58 59 dma-names: 60 items: 61 - const: tx 62 - const: rx 63 64 rx-sample-delay-ns: 65 default: 0 66 description: 67 Nano seconds to delay after the SCLK edge before sampling Rx data 68 (may need to be fine tuned for high capacitance lines). 69 If not specified 0 will be used. 70 71 pinctrl-names: 72 minItems: 1 73 items: 74 - const: default 75 - const: sleep 76 description: 77 Names for the pin configuration(s); may be "default" or "sleep", 78 where the "sleep" configuration may describe the state 79 the pins should be in during system suspend. 80 81required: 82 - compatible 83 - reg 84 - interrupts 85 - clocks 86 - clock-names 87 88examples: 89 - | 90 #include <dt-bindings/clock/rk3188-cru-common.h> 91 #include <dt-bindings/interrupt-controller/arm-gic.h> 92 #include <dt-bindings/interrupt-controller/irq.h> 93 spi0: spi@ff110000 { 94 compatible = "rockchip,rk3066-spi"; 95 reg = <0xff110000 0x1000>; 96 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 97 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; 98 clock-names = "spiclk", "apb_pclk"; 99 dmas = <&pdma1 11>, <&pdma1 12>; 100 dma-names = "tx", "rx"; 101 pinctrl-0 = <&spi1_pins>; 102 pinctrl-1 = <&spi1_sleep>; 103 pinctrl-names = "default", "sleep"; 104 rx-sample-delay-ns = <10>; 105 #address-cells = <1>; 106 #size-cells = <0>; 107 }; 108