1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM PL022 SPI controller
8
9maintainers:
10  - Linus Walleij <linus.walleij@linaro.org>
11
12allOf:
13  - $ref: "spi-controller.yaml#"
14
15# We need a select here so we don't match all nodes with 'arm,primecell'
16select:
17  properties:
18    compatible:
19      contains:
20        const: arm,pl022
21  required:
22    - compatible
23
24properties:
25  compatible:
26    items:
27      - const: arm,pl022
28      - const: arm,primecell
29
30  reg:
31    maxItems: 1
32
33  interrupts:
34    maxItems: 1
35
36  clocks:
37    maxItems: 2
38
39  clock-names:
40    items:
41      - enum:
42          - SSPCLK
43          - sspclk
44      - const: apb_pclk
45
46  pl022,autosuspend-delay:
47    description: delay in ms following transfer completion before the
48      runtime power management system suspends the device. A setting of 0
49      indicates no delay and the device will be suspended immediately.
50    $ref: "/schemas/types.yaml#/definitions/uint32"
51
52  pl022,rt:
53    description: indicates the controller should run the message pump with realtime
54      priority to minimise the transfer latency on the bus (boolean)
55    type: boolean
56
57  dmas:
58    description:
59      Two or more DMA channel specifiers following the convention outlined
60      in bindings/dma/dma.txt
61    minItems: 2
62    maxItems: 32
63
64  dma-names:
65    description:
66      There must be at least one channel named "tx" for transmit and named "rx"
67      for receive.
68    minItems: 2
69    maxItems: 32
70    additionalItems: true
71    items:
72      - const: rx
73      - const: tx
74
75  resets:
76    maxItems: 1
77
78patternProperties:
79  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
80    type: object
81    # SPI slave nodes must be children of the SPI master node and can
82    # contain the following properties.
83    properties:
84      pl022,interface:
85        description: SPI interface type
86        $ref: "/schemas/types.yaml#/definitions/uint32"
87        enum:
88          - 0      # SPI
89          - 1      # Texas Instruments Synchronous Serial Frame Format
90          - 2      # Microwire (Half Duplex)
91
92      pl022,com-mode:
93        description: Specifies the transfer mode
94        $ref: "/schemas/types.yaml#/definitions/uint32"
95        enum:
96          - 0      # interrupt mode
97          - 1      # polling mode
98          - 2      # DMA mode
99        default: 1
100
101      pl022,rx-level-trig:
102        description: Rx FIFO watermark level
103        $ref: "/schemas/types.yaml#/definitions/uint32"
104        minimum: 0
105        maximum: 4
106
107      pl022,tx-level-trig:
108        description: Tx FIFO watermark level
109        $ref: "/schemas/types.yaml#/definitions/uint32"
110        minimum: 0
111        maximum: 4
112
113      pl022,ctrl-len:
114        description: Microwire interface - Control length
115        $ref: "/schemas/types.yaml#/definitions/uint32"
116        minimum: 0x03
117        maximum: 0x1f
118
119      pl022,wait-state:
120        description: Microwire interface - Wait state
121        $ref: "/schemas/types.yaml#/definitions/uint32"
122        enum: [0, 1]
123
124      pl022,duplex:
125        description: Microwire interface - Full/Half duplex
126        $ref: "/schemas/types.yaml#/definitions/uint32"
127        enum: [0, 1]
128
129required:
130  - compatible
131  - reg
132  - interrupts
133
134unevaluatedProperties: false
135
136examples:
137  - |
138    spi@e0100000 {
139      compatible = "arm,pl022", "arm,primecell";
140      reg = <0xe0100000 0x1000>;
141      #address-cells = <1>;
142      #size-cells = <0>;
143      interrupts = <0 31 0x4>;
144      dmas = <&dma_controller 23 1>,
145        <&dma_controller 24 0>;
146      dma-names = "rx", "tx";
147
148      m25p80@1 {
149        compatible = "st,m25p80";
150        reg = <1>;
151        spi-max-frequency = <12000000>;
152        spi-cpol;
153        spi-cpha;
154        pl022,interface = <0>;
155        pl022,com-mode = <0x2>;
156        pl022,rx-level-trig = <0>;
157        pl022,tx-level-trig = <0>;
158        pl022,ctrl-len = <0x11>;
159        pl022,wait-state = <0>;
160        pl022,duplex = <0>;
161      };
162    };
163...
164