1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP Flex Serial Peripheral Interface (FSPI) 8 9maintainers: 10 - Han Xu <han.xu@nxp.com> 11 - Kuldeep Singh <singh.kuldeep87k@gmail.com> 12 13allOf: 14 - $ref: "spi-controller.yaml#" 15 16properties: 17 compatible: 18 enum: 19 - nxp,imx8dxl-fspi 20 - nxp,imx8mm-fspi 21 - nxp,imx8mp-fspi 22 - nxp,imx8qxp-fspi 23 - nxp,lx2160a-fspi 24 25 reg: 26 items: 27 - description: registers address space 28 - description: memory mapped address space 29 30 reg-names: 31 items: 32 - const: fspi_base 33 - const: fspi_mmap 34 35 interrupts: 36 maxItems: 1 37 38 clocks: 39 items: 40 - description: SPI bus clock 41 - description: SPI serial clock 42 43 clock-names: 44 items: 45 - const: fspi_en 46 - const: fspi 47 48required: 49 - compatible 50 - reg 51 - reg-names 52 - interrupts 53 - clocks 54 - clock-names 55 56unevaluatedProperties: false 57 58examples: 59 - | 60 #include <dt-bindings/interrupt-controller/arm-gic.h> 61 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 62 63 soc { 64 #address-cells = <2>; 65 #size-cells = <2>; 66 67 spi@20c0000 { 68 compatible = "nxp,lx2160a-fspi"; 69 reg = <0x0 0x20c0000 0x0 0x100000>, 70 <0x0 0x20000000 0x0 0x10000000>; 71 reg-names = "fspi_base", "fspi_mmap"; 72 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 73 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>, 74 <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; 75 clock-names = "fspi_en", "fspi"; 76 #address-cells = <1>; 77 #size-cells = <0>; 78 79 flash@0 { 80 compatible = "jedec,spi-nor"; 81 spi-max-frequency = <50000000>; 82 reg = <0>; 83 spi-rx-bus-width = <8>; 84 spi-tx-bus-width = <8>; 85 }; 86 }; 87 }; 88