1ARM Freescale DSPI controller
2
3Required properties:
4- compatible : "fsl,vf610-dspi"
5- reg : Offset and length of the register set for the device
6- interrupts : Should contain SPI controller interrupt
7- clocks: from common clock binding: handle to dspi clock.
8- clock-names: from common clock binding: Shall be "dspi".
9- pinctrl-0: pin control group to be used for this controller.
10- pinctrl-names: must contain a "default" entry.
11- spi-num-chipselects : the number of the chipselect signals.
12- bus-num : the slave chip chipselect signal number.
13
14Optional property:
15- big-endian: If present the dspi device's registers are implemented
16  in big endian mode, otherwise in native mode(same with CPU), for more
17  detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
18
19Example:
20
21dspi0@4002c000 {
22	#address-cells = <1>;
23	#size-cells = <0>;
24	compatible = "fsl,vf610-dspi";
25	reg = <0x4002c000 0x1000>;
26	interrupts = <0 67 0x04>;
27	clocks = <&clks VF610_CLK_DSPI0>;
28	clock-names = "dspi";
29	spi-num-chipselects = <5>;
30	bus-num = <0>;
31	pinctrl-names = "default";
32	pinctrl-0 = <&pinctrl_dspi0_1>;
33	big-endian;
34	status = "okay";
35
36	sflash: at26df081a@0 {
37		#address-cells = <1>;
38		#size-cells = <1>;
39		compatible = "atmel,at26df081a";
40		spi-max-frequency = <16000000>;
41		spi-cpol;
42		spi-cpha;
43		reg = <0>;
44		linux,modalias = "m25p80";
45		modal = "at26df081a";
46	};
47};
48
49
50