1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: SPI Controller Generic Binding
8
9maintainers:
10  - Mark Brown <broonie@kernel.org>
11
12description: |
13  SPI busses can be described with a node for the SPI controller device
14  and a set of child nodes for each SPI slave on the bus. The system SPI
15  controller may be described for use in SPI master mode or in SPI slave mode,
16  but not for both at the same time.
17
18properties:
19  $nodename:
20    pattern: "^spi(@.*|-[0-9a-f])*$"
21
22  "#address-cells":
23    enum: [0, 1]
24
25  "#size-cells":
26    const: 0
27
28  cs-gpios:
29    description: |
30      GPIOs used as chip selects.
31      If that property is used, the number of chip selects will be
32      increased automatically with max(cs-gpios, hardware chip selects).
33
34      So if, for example, the controller has 4 CS lines, and the
35      cs-gpios looks like this
36        cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
37
38      Then it should be configured so that num_chipselect = 4, with
39      the following mapping
40        cs0 : &gpio1 0 0
41        cs1 : native
42        cs2 : &gpio1 1 0
43        cs3 : &gpio1 2 0
44
45  num-cs:
46    $ref: /schemas/types.yaml#/definitions/uint32
47    description:
48      Total number of chip selects.
49
50  spi-slave:
51    $ref: /schemas/types.yaml#/definitions/flag
52    description:
53      The SPI controller acts as a slave, instead of a master.
54
55allOf:
56  - if:
57      not:
58        required:
59          - spi-slave
60    then:
61      properties:
62        "#address-cells":
63          const: 1
64    else:
65      properties:
66        "#address-cells":
67          const: 0
68
69patternProperties:
70  "^slave$":
71    type: object
72
73    properties:
74      compatible:
75        description:
76          Compatible of the SPI device.
77
78    required:
79      - compatible
80
81  "^.*@[0-9a-f]+$":
82    type: object
83
84    properties:
85      compatible:
86        description:
87          Compatible of the SPI device.
88
89      reg:
90        minimum: 0
91        maximum: 256
92        description:
93          Chip select used by the device.
94
95      spi-3wire:
96        $ref: /schemas/types.yaml#/definitions/flag
97        description:
98          The device requires 3-wire mode.
99
100      spi-cpha:
101        $ref: /schemas/types.yaml#/definitions/flag
102        description:
103          The device requires shifted clock phase (CPHA) mode.
104
105      spi-cpol:
106        $ref: /schemas/types.yaml#/definitions/flag
107        description:
108          The device requires inverse clock polarity (CPOL) mode.
109
110      spi-cs-high:
111        $ref: /schemas/types.yaml#/definitions/flag
112        description:
113          The device requires the chip select active high.
114
115      spi-lsb-first:
116        $ref: /schemas/types.yaml#/definitions/flag
117        description:
118          The device requires the LSB first mode.
119
120      spi-max-frequency:
121        $ref: /schemas/types.yaml#/definitions/uint32
122        description:
123          Maximum SPI clocking speed of the device in Hz.
124
125      spi-rx-bus-width:
126        description:
127          Bus width to the SPI bus used for read transfers.
128        $ref: /schemas/types.yaml#/definitions/uint32
129        enum: [1, 2, 4, 8]
130        default: 1
131
132      spi-rx-delay-us:
133        description:
134          Delay, in microseconds, after a read transfer.
135
136      spi-tx-bus-width:
137        description:
138          Bus width to the SPI bus used for write transfers.
139        $ref: /schemas/types.yaml#/definitions/uint32
140        enum: [1, 2, 4, 8]
141        default: 1
142
143      spi-tx-delay-us:
144        description:
145          Delay, in microseconds, after a write transfer.
146
147    required:
148      - compatible
149      - reg
150
151additionalProperties: true
152
153examples:
154  - |
155    spi@f00 {
156        #address-cells = <1>;
157        #size-cells = <0>;
158        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
159        reg = <0xf00 0x20>;
160        interrupts = <2 13 0 2 14 0>;
161        interrupt-parent = <&mpc5200_pic>;
162
163        ethernet-switch@0 {
164            compatible = "micrel,ks8995m";
165            spi-max-frequency = <1000000>;
166            reg = <0>;
167        };
168
169        codec@1 {
170            compatible = "ti,tlv320aic26";
171            spi-max-frequency = <100000>;
172            reg = <1>;
173        };
174    };
175