10a1b9293SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 20a1b9293SMaxime Ripard%YAML 1.2 30a1b9293SMaxime Ripard--- 40a1b9293SMaxime Ripard$id: http://devicetree.org/schemas/spi/spi-controller.yaml# 50a1b9293SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 60a1b9293SMaxime Ripard 70a1b9293SMaxime Ripardtitle: SPI Controller Generic Binding 80a1b9293SMaxime Ripard 90a1b9293SMaxime Ripardmaintainers: 100a1b9293SMaxime Ripard - Mark Brown <broonie@kernel.org> 110a1b9293SMaxime Ripard 120a1b9293SMaxime Riparddescription: | 130a1b9293SMaxime Ripard SPI busses can be described with a node for the SPI controller device 140a1b9293SMaxime Ripard and a set of child nodes for each SPI slave on the bus. The system SPI 150a1b9293SMaxime Ripard controller may be described for use in SPI master mode or in SPI slave mode, 160a1b9293SMaxime Ripard but not for both at the same time. 170a1b9293SMaxime Ripard 180a1b9293SMaxime Ripardproperties: 190a1b9293SMaxime Ripard $nodename: 200a1b9293SMaxime Ripard pattern: "^spi(@.*|-[0-9a-f])*$" 210a1b9293SMaxime Ripard 220a1b9293SMaxime Ripard "#address-cells": 230a1b9293SMaxime Ripard const: 1 240a1b9293SMaxime Ripard 250a1b9293SMaxime Ripard "#size-cells": 260a1b9293SMaxime Ripard const: 0 270a1b9293SMaxime Ripard 280a1b9293SMaxime Ripard cs-gpios: 290a1b9293SMaxime Ripard description: | 300a1b9293SMaxime Ripard GPIOs used as chip selects. 310a1b9293SMaxime Ripard If that property is used, the number of chip selects will be 320a1b9293SMaxime Ripard increased automatically with max(cs-gpios, hardware chip selects). 330a1b9293SMaxime Ripard 340a1b9293SMaxime Ripard So if, for example, the controller has 2 CS lines, and the 350a1b9293SMaxime Ripard cs-gpios looks like this 360a1b9293SMaxime Ripard cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>; 370a1b9293SMaxime Ripard 380a1b9293SMaxime Ripard Then it should be configured so that num_chipselect = 4, with 390a1b9293SMaxime Ripard the following mapping 400a1b9293SMaxime Ripard cs0 : &gpio1 0 0 410a1b9293SMaxime Ripard cs1 : native 420a1b9293SMaxime Ripard cs2 : &gpio1 1 0 430a1b9293SMaxime Ripard cs3 : &gpio1 2 0 440a1b9293SMaxime Ripard 450a1b9293SMaxime Ripard num-cs: 460a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/uint32 470a1b9293SMaxime Ripard description: 480a1b9293SMaxime Ripard Total number of chip selects. 490a1b9293SMaxime Ripard 500a1b9293SMaxime Ripard spi-slave: 510a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 520a1b9293SMaxime Ripard description: 530a1b9293SMaxime Ripard The SPI controller acts as a slave, instead of a master. 540a1b9293SMaxime Ripard 550a1b9293SMaxime RipardpatternProperties: 560a1b9293SMaxime Ripard "^slave$": 570a1b9293SMaxime Ripard type: object 580a1b9293SMaxime Ripard 590a1b9293SMaxime Ripard properties: 600a1b9293SMaxime Ripard compatible: 610a1b9293SMaxime Ripard description: 620a1b9293SMaxime Ripard Compatible of the SPI device. 630a1b9293SMaxime Ripard 640a1b9293SMaxime Ripard required: 650a1b9293SMaxime Ripard - compatible 660a1b9293SMaxime Ripard 670a1b9293SMaxime Ripard "^.*@[0-9a-f]+$": 680a1b9293SMaxime Ripard type: object 690a1b9293SMaxime Ripard 700a1b9293SMaxime Ripard properties: 710a1b9293SMaxime Ripard compatible: 720a1b9293SMaxime Ripard description: 730a1b9293SMaxime Ripard Compatible of the SPI device. 740a1b9293SMaxime Ripard 750a1b9293SMaxime Ripard reg: 760a1b9293SMaxime Ripard maxItems: 1 770a1b9293SMaxime Ripard minimum: 0 780a1b9293SMaxime Ripard maximum: 256 790a1b9293SMaxime Ripard description: 800a1b9293SMaxime Ripard Chip select used by the device. 810a1b9293SMaxime Ripard 820a1b9293SMaxime Ripard spi-3wire: 830a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 840a1b9293SMaxime Ripard description: 850a1b9293SMaxime Ripard The device requires 3-wire mode. 860a1b9293SMaxime Ripard 870a1b9293SMaxime Ripard spi-cpha: 880a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 890a1b9293SMaxime Ripard description: 900a1b9293SMaxime Ripard The device requires shifted clock phase (CPHA) mode. 910a1b9293SMaxime Ripard 920a1b9293SMaxime Ripard spi-cpol: 930a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 940a1b9293SMaxime Ripard description: 950a1b9293SMaxime Ripard The device requires inverse clock polarity (CPOL) mode. 960a1b9293SMaxime Ripard 970a1b9293SMaxime Ripard spi-cs-high: 980a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 990a1b9293SMaxime Ripard description: 1000a1b9293SMaxime Ripard The device requires the chip select active high. 1010a1b9293SMaxime Ripard 1020a1b9293SMaxime Ripard spi-lsb-first: 1030a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 1040a1b9293SMaxime Ripard description: 1050a1b9293SMaxime Ripard The device requires the LSB first mode. 1060a1b9293SMaxime Ripard 1070a1b9293SMaxime Ripard spi-max-frequency: 1080a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/uint32 1090a1b9293SMaxime Ripard description: 1100a1b9293SMaxime Ripard Maximum SPI clocking speed of the device in Hz. 1110a1b9293SMaxime Ripard 1120a1b9293SMaxime Ripard spi-rx-bus-width: 1130a1b9293SMaxime Ripard allOf: 1140a1b9293SMaxime Ripard - $ref: /schemas/types.yaml#/definitions/uint32 1150a1b9293SMaxime Ripard - enum: [ 1, 2, 4 ] 1160a1b9293SMaxime Ripard - default: 1 1170a1b9293SMaxime Ripard description: 1180a1b9293SMaxime Ripard Bus width to the SPI bus used for MISO. 1190a1b9293SMaxime Ripard 1200a1b9293SMaxime Ripard spi-rx-delay-us: 1210a1b9293SMaxime Ripard description: 1220a1b9293SMaxime Ripard Delay, in microseconds, after a read transfer. 1230a1b9293SMaxime Ripard 1240a1b9293SMaxime Ripard spi-tx-bus-width: 1250a1b9293SMaxime Ripard allOf: 1260a1b9293SMaxime Ripard - $ref: /schemas/types.yaml#/definitions/uint32 1270a1b9293SMaxime Ripard - enum: [ 1, 2, 4 ] 1280a1b9293SMaxime Ripard - default: 1 1290a1b9293SMaxime Ripard description: 1300a1b9293SMaxime Ripard Bus width to the SPI bus used for MOSI. 1310a1b9293SMaxime Ripard 1320a1b9293SMaxime Ripard spi-tx-delay-us: 1330a1b9293SMaxime Ripard description: 1340a1b9293SMaxime Ripard Delay, in microseconds, after a write transfer. 1350a1b9293SMaxime Ripard 1360a1b9293SMaxime Ripard required: 1370a1b9293SMaxime Ripard - compatible 1380a1b9293SMaxime Ripard - reg 1390a1b9293SMaxime Ripard 1400a1b9293SMaxime Ripardexamples: 1410a1b9293SMaxime Ripard - | 1420a1b9293SMaxime Ripard spi@f00 { 1430a1b9293SMaxime Ripard #address-cells = <1>; 1440a1b9293SMaxime Ripard #size-cells = <0>; 1450a1b9293SMaxime Ripard compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 1460a1b9293SMaxime Ripard reg = <0xf00 0x20>; 1470a1b9293SMaxime Ripard interrupts = <2 13 0 2 14 0>; 1480a1b9293SMaxime Ripard interrupt-parent = <&mpc5200_pic>; 1490a1b9293SMaxime Ripard 1500a1b9293SMaxime Ripard ethernet-switch@0 { 1510a1b9293SMaxime Ripard compatible = "micrel,ks8995m"; 1520a1b9293SMaxime Ripard spi-max-frequency = <1000000>; 1530a1b9293SMaxime Ripard reg = <0>; 1540a1b9293SMaxime Ripard }; 1550a1b9293SMaxime Ripard 1560a1b9293SMaxime Ripard codec@1 { 1570a1b9293SMaxime Ripard compatible = "ti,tlv320aic26"; 1580a1b9293SMaxime Ripard spi-max-frequency = <100000>; 1590a1b9293SMaxime Ripard reg = <1>; 1600a1b9293SMaxime Ripard }; 1610a1b9293SMaxime Ripard }; 162