1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
8
9maintainers:
10  - Mark Brown <broonie@kernel.org>
11
12allOf:
13  - $ref: "spi-controller.yaml#"
14  - if:
15      properties:
16        compatible:
17          contains:
18            enum:
19              - mscc,ocelot-spi
20              - mscc,jaguar2-spi
21    then:
22      properties:
23        reg:
24          minItems: 2
25  - if:
26      properties:
27        compatible:
28          contains:
29            enum:
30              - baikal,bt1-sys-ssi
31    then:
32      properties:
33        mux-controls:
34          maxItems: 1
35      required:
36        - mux-controls
37    else:
38      required:
39        - interrupts
40
41properties:
42  compatible:
43    oneOf:
44      - description: Generic DW SPI Controller
45        enum:
46          - snps,dw-apb-ssi
47          - snps,dwc-ssi-1.01a
48      - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
49        items:
50          - enum:
51              - mscc,ocelot-spi
52              - mscc,jaguar2-spi
53          - const: snps,dw-apb-ssi
54      - description: Microchip Sparx5 SoC SPI Controller
55        const: microchip,sparx5-spi
56      - description: Amazon Alpine SPI Controller
57        const: amazon,alpine-dw-apb-ssi
58      - description: Renesas RZ/N1 SPI Controller
59        items:
60          - const: renesas,rzn1-spi
61          - const: snps,dw-apb-ssi
62      - description: Intel Keem Bay SPI Controller
63        const: intel,keembay-ssi
64      - description: Baikal-T1 SPI Controller
65        const: baikal,bt1-ssi
66      - description: Baikal-T1 System Boot SPI Controller
67        const: baikal,bt1-sys-ssi
68
69  reg:
70    minItems: 1
71    items:
72      - description: DW APB SSI controller memory mapped registers
73      - description: SPI MST region map or directly mapped SPI ROM
74
75  interrupts:
76    maxItems: 1
77
78  clocks:
79    minItems: 1
80    items:
81      - description: SPI Controller reference clock source
82      - description: APB interface clock source
83
84  clock-names:
85    minItems: 1
86    items:
87      - const: ssi_clk
88      - const: pclk
89
90  resets:
91    maxItems: 1
92
93  reset-names:
94    const: spi
95
96  reg-io-width:
97    $ref: /schemas/types.yaml#/definitions/uint32
98    description: I/O register width (in bytes) implemented by this device
99    default: 4
100    enum: [ 2, 4 ]
101
102  num-cs:
103    default: 4
104    minimum: 1
105    maximum: 4
106
107  dmas:
108    items:
109      - description: TX DMA Channel
110      - description: RX DMA Channel
111
112  dma-names:
113    items:
114      - const: tx
115      - const: rx
116
117  rx-sample-delay-ns:
118    default: 0
119    description: Default value of the rx-sample-delay-ns property.
120      This value will be used if the property is not explicitly defined
121      for a SPI slave device. See below.
122
123patternProperties:
124  "^.*@[0-9a-f]+$":
125    type: object
126    properties:
127      reg:
128        minimum: 0
129        maximum: 3
130
131      spi-rx-bus-width:
132        const: 1
133
134      spi-tx-bus-width:
135        const: 1
136
137      rx-sample-delay-ns:
138        description: SPI Rx sample delay offset, unit is nanoseconds.
139          The delay from the default sample time before the actual
140          sample of the rxd input signal occurs. The "rx_sample_delay"
141          is an optional feature of the designware controller, and the
142          upper limit is also subject to controller configuration.
143
144unevaluatedProperties: false
145
146required:
147  - compatible
148  - reg
149  - "#address-cells"
150  - "#size-cells"
151  - clocks
152
153examples:
154  - |
155    spi@fff00000 {
156      compatible = "snps,dw-apb-ssi";
157      reg = <0xfff00000 0x1000>;
158      #address-cells = <1>;
159      #size-cells = <0>;
160      interrupts = <0 154 4>;
161      clocks = <&spi_m_clk>;
162      num-cs = <2>;
163      cs-gpios = <&gpio0 13 0>,
164                 <&gpio0 14 0>;
165      rx-sample-delay-ns = <3>;
166      spi-flash@1 {
167        compatible = "spi-nand";
168        reg = <1>;
169        rx-sample-delay-ns = <7>;
170      };
171    };
172  - |
173    spi@1f040100 {
174      compatible = "baikal,bt1-sys-ssi";
175      reg = <0x1f040100 0x900>,
176            <0x1c000000 0x1000000>;
177      #address-cells = <1>;
178      #size-cells = <0>;
179      mux-controls = <&boot_mux>;
180      clocks = <&ccu_sys>;
181      clock-names = "ssi_clk";
182    };
183...
184