1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface 8 9maintainers: 10 - Mark Brown <broonie@kernel.org> 11 12allOf: 13 - $ref: "spi-controller.yaml#" 14 - if: 15 properties: 16 compatible: 17 contains: 18 enum: 19 - mscc,ocelot-spi 20 - mscc,jaguar2-spi 21 then: 22 properties: 23 reg: 24 minItems: 2 25 26properties: 27 compatible: 28 oneOf: 29 - description: Generic DW SPI Controller 30 enum: 31 - snps,dw-apb-ssi 32 - snps,dwc-ssi-1.01a 33 - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller 34 items: 35 - enum: 36 - mscc,ocelot-spi 37 - mscc,jaguar2-spi 38 - const: snps,dw-apb-ssi 39 - description: Amazon Alpine SPI Controller 40 const: amazon,alpine-dw-apb-ssi 41 - description: Renesas RZ/N1 SPI Controller 42 items: 43 - const: renesas,rzn1-spi 44 - const: snps,dw-apb-ssi 45 - description: Intel Keem Bay SPI Controller 46 const: intel,keembay-ssi 47 48 reg: 49 minItems: 1 50 items: 51 - description: DW APB SSI controller memory mapped registers 52 - description: SPI MST region map 53 54 interrupts: 55 maxItems: 1 56 57 clocks: 58 minItems: 1 59 items: 60 - description: SPI Controller reference clock source 61 - description: APB interface clock source 62 63 clock-names: 64 minItems: 1 65 items: 66 - const: ssi_clk 67 - const: pclk 68 69 resets: 70 maxItems: 1 71 72 reset-names: 73 const: spi 74 75 reg-io-width: 76 $ref: /schemas/types.yaml#/definitions/uint32 77 description: I/O register width (in bytes) implemented by this device 78 default: 4 79 enum: [ 2, 4 ] 80 81 num-cs: 82 default: 4 83 minimum: 1 84 maximum: 4 85 86 dmas: 87 items: 88 - description: TX DMA Channel 89 - description: RX DMA Channel 90 91 dma-names: 92 items: 93 - const: tx 94 - const: rx 95 96patternProperties: 97 "^.*@[0-9a-f]+$": 98 type: object 99 properties: 100 reg: 101 minimum: 0 102 maximum: 3 103 104 spi-rx-bus-width: 105 const: 1 106 107 spi-tx-bus-width: 108 const: 1 109 110unevaluatedProperties: false 111 112required: 113 - compatible 114 - reg 115 - "#address-cells" 116 - "#size-cells" 117 - interrupts 118 - clocks 119 120examples: 121 - | 122 spi@fff00000 { 123 compatible = "snps,dw-apb-ssi"; 124 reg = <0xfff00000 0x1000>; 125 #address-cells = <1>; 126 #size-cells = <0>; 127 interrupts = <0 154 4>; 128 clocks = <&spi_m_clk>; 129 num-cs = <2>; 130 cs-gpios = <&gpio0 13 0>, 131 <&gpio0 14 0>; 132 }; 133... 134