1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm Quad Serial Peripheral Interface (QSPI)
9
10maintainers:
11  - Mukesh Savaliya <msavaliy@codeaurora.org>
12  - Akash Asthana <akashast@codeaurora.org>
13
14description: The QSPI controller allows SPI protocol communication in single,
15  dual, or quad wire transmission modes for read/write access to slaves such
16  as NOR flash.
17
18allOf:
19  - $ref: /schemas/spi/spi-controller.yaml#
20
21properties:
22  compatible:
23    items:
24      - enum:
25          - qcom,sc7180-qspi
26          - qcom,sc7280-qspi
27          - qcom,sdm845-qspi
28
29      - const: qcom,qspi-v1
30
31  reg:
32    maxItems: 1
33
34  interrupts:
35    maxItems: 1
36
37  clock-names:
38    items:
39      - const: iface
40      - const: core
41
42  clocks:
43    items:
44      - description: AHB clock
45      - description: QSPI core clock
46
47  interconnects:
48    minItems: 1
49    maxItems: 2
50
51  interconnect-names:
52    minItems: 1
53    items:
54      - const: qspi-config
55      - const: qspi-memory
56
57required:
58  - compatible
59  - reg
60  - interrupts
61  - clock-names
62  - clocks
63
64unevaluatedProperties: false
65
66examples:
67  - |
68    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
69    #include <dt-bindings/interrupt-controller/arm-gic.h>
70
71    soc: soc {
72        #address-cells = <2>;
73        #size-cells = <2>;
74
75        qspi: spi@88df000 {
76            compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
77            reg = <0 0x88df000 0 0x600>;
78            #address-cells = <1>;
79            #size-cells = <0>;
80            interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
81            clock-names = "iface", "core";
82            clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
83                         <&gcc GCC_QSPI_CORE_CLK>;
84
85            flash@0 {
86                compatible = "jedec,spi-nor";
87                reg = <0>;
88                spi-max-frequency = <25000000>;
89                spi-tx-bus-width = <2>;
90                spi-rx-bus-width = <2>;
91            };
92
93        };
94    };
95...
96