14ad26864STomer MaimonNuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver
24ad26864STomer Maimon
34ad26864STomer MaimonNuvoton NPCM7xx SOC support two PSPI channels.
44ad26864STomer Maimon
54ad26864STomer MaimonRequired properties:
64ad26864STomer Maimon - compatible : "nuvoton,npcm750-pspi" for NPCM7XX BMC
74ad26864STomer Maimon - #address-cells : should be 1. see spi-bus.txt
84ad26864STomer Maimon - #size-cells : should be 0. see spi-bus.txt
94ad26864STomer Maimon - specifies physical base address and size of the register.
104ad26864STomer Maimon - interrupts : contain PSPI interrupt.
114ad26864STomer Maimon - clocks : phandle of PSPI reference clock.
124ad26864STomer Maimon - clock-names: Should be "clk_apb5".
134ad26864STomer Maimon - pinctrl-names : a pinctrl state named "default" must be defined.
144ad26864STomer Maimon - pinctrl-0 : phandle referencing pin configuration of the device.
154ad26864STomer Maimon - cs-gpios: Specifies the gpio pins to be used for chipselects.
164ad26864STomer Maimon            See: Documentation/devicetree/bindings/spi/spi-bus.txt
174ad26864STomer Maimon
184ad26864STomer MaimonOptional properties:
194ad26864STomer Maimon- clock-frequency : Input clock frequency to the PSPI block in Hz.
204ad26864STomer Maimon		    Default is 25000000 Hz.
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224ad26864STomer MaimonExample:
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244ad26864STomer Maimonspi0: spi@f0200000 {
254ad26864STomer Maimon	compatible = "nuvoton,npcm750-pspi";
264ad26864STomer Maimon	reg = <0xf0200000 0x1000>;
274ad26864STomer Maimon	pinctrl-names = "default";
284ad26864STomer Maimon	pinctrl-0 = <&pspi1_pins>;
294ad26864STomer Maimon	#address-cells = <1>;
304ad26864STomer Maimon	#size-cells = <0>;
314ad26864STomer Maimon	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
324ad26864STomer Maimon	clocks = <&clk NPCM7XX_CLK_APB5>;
334ad26864STomer Maimon	clock-names = "clk_apb5";
344ad26864STomer Maimon	cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
354ad26864STomer Maimon};
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