160edd652SLeilk Liu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 260edd652SLeilk Liu%YAML 1.2 360edd652SLeilk Liu--- 460edd652SLeilk Liu$id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml# 560edd652SLeilk Liu$schema: http://devicetree.org/meta-schemas/core.yaml# 660edd652SLeilk Liu 760edd652SLeilk Liutitle: SPI Slave controller for MediaTek ARM SoCs 860edd652SLeilk Liu 960edd652SLeilk Liumaintainers: 1060edd652SLeilk Liu - Leilk Liu <leilk.liu@mediatek.com> 1160edd652SLeilk Liu 1260edd652SLeilk LiuallOf: 13*99a7fa0eSKrzysztof Kozlowski - $ref: /schemas/spi/spi-controller.yaml# 1460edd652SLeilk Liu 1560edd652SLeilk Liuproperties: 1660edd652SLeilk Liu compatible: 1760edd652SLeilk Liu enum: 1860edd652SLeilk Liu - mediatek,mt2712-spi-slave 1960edd652SLeilk Liu - mediatek,mt8195-spi-slave 2060edd652SLeilk Liu 2160edd652SLeilk Liu reg: 2260edd652SLeilk Liu maxItems: 1 2360edd652SLeilk Liu 2460edd652SLeilk Liu interrupts: 2560edd652SLeilk Liu maxItems: 1 2660edd652SLeilk Liu 2760edd652SLeilk Liu clocks: 2860edd652SLeilk Liu maxItems: 1 2960edd652SLeilk Liu 3060edd652SLeilk Liu clock-names: 3160edd652SLeilk Liu items: 3260edd652SLeilk Liu - const: spi 3360edd652SLeilk Liu 3460edd652SLeilk Liurequired: 3560edd652SLeilk Liu - compatible 3660edd652SLeilk Liu - reg 3760edd652SLeilk Liu - interrupts 3860edd652SLeilk Liu - clocks 3960edd652SLeilk Liu - clock-names 4060edd652SLeilk Liu 4160edd652SLeilk LiuunevaluatedProperties: false 4260edd652SLeilk Liu 4360edd652SLeilk Liuexamples: 4460edd652SLeilk Liu - | 4560edd652SLeilk Liu #include <dt-bindings/clock/mt2712-clk.h> 4660edd652SLeilk Liu #include <dt-bindings/gpio/gpio.h> 4760edd652SLeilk Liu #include <dt-bindings/interrupt-controller/arm-gic.h> 4860edd652SLeilk Liu #include <dt-bindings/interrupt-controller/irq.h> 4960edd652SLeilk Liu 5060edd652SLeilk Liu spi@10013000 { 5160edd652SLeilk Liu compatible = "mediatek,mt2712-spi-slave"; 5260edd652SLeilk Liu reg = <0x10013000 0x100>; 5360edd652SLeilk Liu interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_LOW>; 5460edd652SLeilk Liu clocks = <&infracfg CLK_INFRA_AO_SPI1>; 5560edd652SLeilk Liu clock-names = "spi"; 5660edd652SLeilk Liu assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>; 5760edd652SLeilk Liu assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; 5860edd652SLeilk Liu }; 59