1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11
12allOf:
13  - $ref: /schemas/spi/spi-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - const: fsl,imx1-cspi
19      - const: fsl,imx21-cspi
20      - const: fsl,imx27-cspi
21      - const: fsl,imx31-cspi
22      - const: fsl,imx35-cspi
23      - const: fsl,imx51-ecspi
24      - const: fsl,imx53-ecspi
25      - items:
26          - enum:
27              - fsl,imx25-cspi
28              - fsl,imx50-cspi
29              - fsl,imx51-cspi
30              - fsl,imx53-cspi
31          - const: fsl,imx35-cspi
32      - items:
33          - const: fsl,imx8mp-ecspi
34          - const: fsl,imx6ul-ecspi
35      - items:
36          - enum:
37              - fsl,imx50-ecspi
38              - fsl,imx6q-ecspi
39              - fsl,imx6sx-ecspi
40              - fsl,imx6sl-ecspi
41              - fsl,imx6sll-ecspi
42              - fsl,imx6ul-ecspi
43              - fsl,imx7d-ecspi
44              - fsl,imx8mq-ecspi
45              - fsl,imx8mm-ecspi
46              - fsl,imx8mn-ecspi
47          - const: fsl,imx51-ecspi
48
49  reg:
50    maxItems: 1
51
52  interrupts:
53    maxItems: 1
54
55  clocks:
56    items:
57      - description: SoC SPI ipg clock
58      - description: SoC SPI per clock
59
60  clock-names:
61    items:
62      - const: ipg
63      - const: per
64
65  dmas:
66    items:
67      - description: DMA controller phandle and request line for RX
68      - description: DMA controller phandle and request line for TX
69
70  dma-names:
71    items:
72      - const: rx
73      - const: tx
74
75  fsl,spi-rdy-drctl:
76    $ref: /schemas/types.yaml#/definitions/uint32
77    description: |
78      Integer, representing the value of DRCTL, the register controlling
79      the SPI_READY handling. Note that to enable the DRCTL consideration,
80      the SPI_READY mode-flag needs to be set too.
81      Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
82    enum: [0, 1, 2]
83
84required:
85  - compatible
86  - reg
87  - interrupts
88  - clocks
89  - clock-names
90
91unevaluatedProperties: false
92
93examples:
94  - |
95    #include <dt-bindings/clock/imx5-clock.h>
96
97    spi@70010000 {
98        #address-cells = <1>;
99        #size-cells = <0>;
100        compatible = "fsl,imx51-ecspi";
101        reg = <0x70010000 0x4000>;
102        interrupts = <36>;
103        clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
104                 <&clks IMX5_CLK_ECSPI1_PER_GATE>;
105        clock-names = "ipg", "per";
106    };
107