1*1f01818bSParshuram Thombare# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*1f01818bSParshuram Thombare# Copyright 2020-21 Cadence 3*1f01818bSParshuram Thombare%YAML 1.2 4*1f01818bSParshuram Thombare--- 5*1f01818bSParshuram Thombare$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#" 6*1f01818bSParshuram Thombare$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7*1f01818bSParshuram Thombare 8*1f01818bSParshuram Thombaretitle: Cadence XSPI Controller 9*1f01818bSParshuram Thombare 10*1f01818bSParshuram Thombaremaintainers: 11*1f01818bSParshuram Thombare - Parshuram Thombare <pthombar@cadence.com> 12*1f01818bSParshuram Thombare 13*1f01818bSParshuram Thombaredescription: | 14*1f01818bSParshuram Thombare The XSPI controller allows SPI protocol communication in 15*1f01818bSParshuram Thombare single, dual, quad or octal wire transmission modes for 16*1f01818bSParshuram Thombare read/write access to slaves such as SPI-NOR flash. 17*1f01818bSParshuram Thombare 18*1f01818bSParshuram ThombareallOf: 19*1f01818bSParshuram Thombare - $ref: "spi-controller.yaml#" 20*1f01818bSParshuram Thombare 21*1f01818bSParshuram Thombareproperties: 22*1f01818bSParshuram Thombare compatible: 23*1f01818bSParshuram Thombare const: cdns,xspi-nor 24*1f01818bSParshuram Thombare 25*1f01818bSParshuram Thombare reg: 26*1f01818bSParshuram Thombare items: 27*1f01818bSParshuram Thombare - description: address and length of the controller register set 28*1f01818bSParshuram Thombare - description: address and length of the Slave DMA data port 29*1f01818bSParshuram Thombare - description: address and length of the auxiliary registers 30*1f01818bSParshuram Thombare 31*1f01818bSParshuram Thombare reg-names: 32*1f01818bSParshuram Thombare items: 33*1f01818bSParshuram Thombare - const: io 34*1f01818bSParshuram Thombare - const: sdma 35*1f01818bSParshuram Thombare - const: aux 36*1f01818bSParshuram Thombare 37*1f01818bSParshuram Thombare interrupts: 38*1f01818bSParshuram Thombare maxItems: 1 39*1f01818bSParshuram Thombare 40*1f01818bSParshuram Thombarerequired: 41*1f01818bSParshuram Thombare - compatible 42*1f01818bSParshuram Thombare - reg 43*1f01818bSParshuram Thombare - interrupts 44*1f01818bSParshuram Thombare 45*1f01818bSParshuram ThombareunevaluatedProperties: false 46*1f01818bSParshuram Thombare 47*1f01818bSParshuram Thombareexamples: 48*1f01818bSParshuram Thombare - | 49*1f01818bSParshuram Thombare #include <dt-bindings/interrupt-controller/irq.h> 50*1f01818bSParshuram Thombare bus { 51*1f01818bSParshuram Thombare #address-cells = <2>; 52*1f01818bSParshuram Thombare #size-cells = <2>; 53*1f01818bSParshuram Thombare 54*1f01818bSParshuram Thombare xspi: spi@a0010000 { 55*1f01818bSParshuram Thombare #address-cells = <1>; 56*1f01818bSParshuram Thombare #size-cells = <0>; 57*1f01818bSParshuram Thombare compatible = "cdns,xspi-nor"; 58*1f01818bSParshuram Thombare reg = <0x0 0xa0010000 0x0 0x1040>, 59*1f01818bSParshuram Thombare <0x0 0xb0000000 0x0 0x1000>, 60*1f01818bSParshuram Thombare <0x0 0xa0020000 0x0 0x100>; 61*1f01818bSParshuram Thombare reg-names = "io", "sdma", "aux"; 62*1f01818bSParshuram Thombare interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; 63*1f01818bSParshuram Thombare interrupt-parent = <&gic>; 64*1f01818bSParshuram Thombare 65*1f01818bSParshuram Thombare flash@0 { 66*1f01818bSParshuram Thombare compatible = "jedec,spi-nor"; 67*1f01818bSParshuram Thombare spi-max-frequency = <75000000>; 68*1f01818bSParshuram Thombare reg = <0>; 69*1f01818bSParshuram Thombare }; 70*1f01818bSParshuram Thombare 71*1f01818bSParshuram Thombare flash@1 { 72*1f01818bSParshuram Thombare compatible = "jedec,spi-nor"; 73*1f01818bSParshuram Thombare spi-max-frequency = <75000000>; 74*1f01818bSParshuram Thombare reg = <1>; 75*1f01818bSParshuram Thombare }; 76*1f01818bSParshuram Thombare }; 77*1f01818bSParshuram Thombare }; 78