1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A31 SPI Controller Device Tree Bindings
8
9allOf:
10  - $ref: "spi-controller.yaml"
11
12maintainers:
13  - Chen-Yu Tsai <wens@csie.org>
14  - Maxime Ripard <maxime.ripard@bootlin.com>
15
16properties:
17  "#address-cells": true
18  "#size-cells": true
19
20  compatible:
21    enum:
22      - allwinner,sun6i-a31-spi
23      - allwinner,sun8i-h3-spi
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: Bus Clock
34      - description: Module Clock
35
36  clock-names:
37    items:
38      - const: ahb
39      - const: mod
40
41  resets:
42    maxItems: 1
43
44  dmas:
45    items:
46      - description: RX DMA Channel
47      - description: TX DMA Channel
48
49  dma-names:
50    items:
51      - const: rx
52      - const: tx
53
54  num-cs: true
55
56patternProperties:
57  "^.*@[0-9a-f]+":
58    properties:
59      reg:
60        items:
61          minimum: 0
62          maximum: 4
63
64      spi-rx-bus-width:
65        const: 1
66
67      spi-tx-bus-width:
68        const: 1
69
70required:
71  - compatible
72  - reg
73  - interrupts
74  - clocks
75  - clock-names
76
77additionalProperties: false
78
79examples:
80  - |
81    spi1: spi@1c69000 {
82        compatible = "allwinner,sun6i-a31-spi";
83        reg = <0x01c69000 0x1000>;
84        interrupts = <0 66 4>;
85        clocks = <&ahb1_gates 21>, <&spi1_clk>;
86        clock-names = "ahb", "mod";
87        resets = <&ahb1_rst 21>;
88        #address-cells = <1>;
89        #size-cells = <0>;
90    };
91
92  - |
93    spi0: spi@1c68000 {
94        compatible = "allwinner,sun8i-h3-spi";
95        reg = <0x01c68000 0x1000>;
96        interrupts = <0 65 4>;
97        clocks = <&ccu 30>, <&ccu 82>;
98        clock-names = "ahb", "mod";
99        dmas = <&dma 23>, <&dma 23>;
100        dma-names = "rx", "tx";
101        resets = <&ccu 15>;
102        #address-cells = <1>;
103        #size-cells = <0>;
104    };
105
106...
107