1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/wlf,wm8962.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Wolfson WM8962 Ultra-Low Power Stereo CODEC
8
9maintainers:
10  - patches@opensource.cirrus.com
11
12properties:
13  compatible:
14    const: wlf,wm8962
15
16  reg:
17    maxItems: 1
18
19  clocks:
20    maxItems: 1
21
22  interrupts:
23    maxItems: 1
24
25  "#sound-dai-cells":
26    const: 0
27
28  AVDD-supply:
29    description: Analogue supply.
30
31  CPVDD-supply:
32    description: Charge pump power supply.
33
34  DBVDD-supply:
35    description: Digital Buffer Supply.
36
37  DCVDD-supply:
38    description: Digital Core Supply.
39
40  MICVDD-supply:
41    description: Microphone bias amp supply.
42
43  PLLVDD-supply:
44    description: PLL Supply
45
46  SPKVDD1-supply:
47    description: Supply for left speaker drivers.
48
49  SPKVDD2-supply:
50    description: Supply for right speaker drivers.
51
52  spk-mono:
53    $ref: /schemas/types.yaml#/definitions/flag
54    description:
55      If present, the SPK_MONO bit of R51 (Class D Control 2) gets set,
56      indicating that the speaker is in mono mode.
57
58  mic-cfg:
59    $ref: /schemas/types.yaml#/definitions/uint32
60    description:
61      Default register value for R48 (Additional Control 4).
62      If absent, the default should be the register default.
63
64  gpio-cfg:
65    $ref: /schemas/types.yaml#/definitions/uint32-array
66    minItems: 6
67    maxItems: 6
68    description:
69      A list of GPIO configuration register values.  If absent, no
70      configuration of these registers is performed.  Note that only values
71      within [0x0, 0xffff] are valid.  Any other value is regarded as setting
72      the GPIO register to its reset value 0x0.
73
74  port:
75    $ref: audio-graph-port.yaml#
76    unevaluatedProperties: false
77
78required:
79  - compatible
80  - reg
81  - AVDD-supply
82  - CPVDD-supply
83  - DBVDD-supply
84  - DCVDD-supply
85  - MICVDD-supply
86  - PLLVDD-supply
87  - SPKVDD1-supply
88  - SPKVDD2-supply
89
90additionalProperties: false
91
92examples:
93  - |
94    #include <dt-bindings/clock/imx6qdl-clock.h>
95
96    i2c {
97          #address-cells = <1>;
98          #size-cells = <0>;
99
100          wm8962: codec@1a {
101                  compatible = "wlf,wm8962";
102                  reg = <0x1a>;
103                  clocks = <&clks IMX6QDL_CLK_CKO>;
104                  DCVDD-supply = <&reg_audio>;
105                  DBVDD-supply = <&reg_audio>;
106                  AVDD-supply = <&reg_audio>;
107                  CPVDD-supply = <&reg_audio>;
108                  MICVDD-supply = <&reg_audio>;
109                  PLLVDD-supply = <&reg_audio>;
110                  SPKVDD1-supply = <&reg_audio>;
111                  SPKVDD2-supply = <&reg_audio>;
112                  gpio-cfg = <
113                          0x0000 /* 0:Default */
114                          0x0000 /* 1:Default */
115                          0x0013 /* 2:FN_DMICCLK */
116                          0x0000 /* 3:Default */
117                          0x8014 /* 4:FN_DMICCDAT */
118                          0x0000 /* 5:Default */
119                  >;
120          };
121    };
122