1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/wlf,wm8903.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: WM8903 audio codec 8 9description: | 10 This device supports I2C only. 11 Pins on the device (for linking into audio routes): 12 * IN1L 13 * IN1R 14 * IN2L 15 * IN2R 16 * IN3L 17 * IN3R 18 * DMICDAT 19 * HPOUTL 20 * HPOUTR 21 * LINEOUTL 22 * LINEOUTR 23 * LOP 24 * LON 25 * ROP 26 * RON 27 * MICBIAS 28 29maintainers: 30 - patches@opensource.cirrus.com 31 32properties: 33 compatible: 34 const: wlf,wm8903 35 36 reg: 37 maxItems: 1 38 39 gpio-controller: true 40 '#gpio-cells': 41 const: 2 42 43 interrupts: 44 maxItems: 1 45 46 micdet-cfg: 47 $ref: /schemas/types.yaml#/definitions/uint32 48 default: 0 49 description: Default register value for R6 (Mic Bias). 50 51 micdet-delay: 52 $ref: /schemas/types.yaml#/definitions/uint32 53 default: 100 54 description: The debounce delay for microphone detection in mS. 55 56 gpio-cfg: 57 $ref: /schemas/types.yaml#/definitions/uint32-array 58 description: | 59 minItems: 5 60 maxItems: 5 61 A list of GPIO configuration register values. 62 If absent, no configuration of these registers is performed. 63 If any entry has the value 0xffffffff, that GPIO's 64 configuration will not be modified. 65 66 AVDD-supply: 67 description: Analog power supply regulator on the AVDD pin. 68 69 CPVDD-supply: 70 description: Charge pump supply regulator on the CPVDD pin. 71 72 DBVDD-supply: 73 description: Digital buffer supply regulator for the DBVDD pin. 74 75 DCVDD-supply: 76 description: Digital core supply regulator for the DCVDD pin. 77 78 79required: 80 - compatible 81 - reg 82 - gpio-controller 83 - '#gpio-cells' 84 85additionalProperties: false 86 87examples: 88 - | 89 i2c { 90 #address-cells = <1>; 91 #size-cells = <0>; 92 93 wm8903: codec@1a { 94 compatible = "wlf,wm8903"; 95 reg = <0x1a>; 96 interrupts = <347>; 97 98 AVDD-supply = <&fooreg_a>; 99 CPVDD-supply = <&fooreg_b>; 100 DBVDD-supply = <&fooreg_c>; 101 DCVDD-supply = <&fooreg_d>; 102 103 gpio-controller; 104 #gpio-cells = <2>; 105 106 micdet-cfg = <0>; 107 micdet-delay = <100>; 108 gpio-cfg = < 109 0x0600 /* DMIC_LR, output */ 110 0x0680 /* DMIC_DAT, input */ 111 0x0000 /* GPIO, output, low */ 112 0x0200 /* Interrupt, output */ 113 0x01a0 /* BCLK, input, active high */ 114 >; 115 }; 116 }; 117