1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/wlf,wm8962.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Wolfson WM8962 Ultra-Low Power Stereo CODEC
8
9maintainers:
10  - patches@opensource.cirrus.com
11
12properties:
13  compatible:
14    const: wlf,wm8962
15
16  reg:
17    maxItems: 1
18
19  clocks:
20    maxItems: 1
21
22  "#sound-dai-cells":
23    const: 0
24
25  AVDD-supply:
26    description: Analogue supply.
27
28  CPVDD-supply:
29    description: Charge pump power supply.
30
31  DBVDD-supply:
32    description: Digital Buffer Supply.
33
34  DCVDD-supply:
35    description: Digital Core Supply.
36
37  MICVDD-supply:
38    description: Microphone bias amp supply.
39
40  PLLVDD-supply:
41    description: PLL Supply
42
43  SPKVDD1-supply:
44    description: Supply for left speaker drivers.
45
46  SPKVDD2-supply:
47    description: Supply for right speaker drivers.
48
49  spk-mono:
50    $ref: /schemas/types.yaml#/definitions/flag
51    description:
52      If present, the SPK_MONO bit of R51 (Class D Control 2) gets set,
53      indicating that the speaker is in mono mode.
54
55  mic-cfg:
56    $ref: /schemas/types.yaml#/definitions/uint32
57    description:
58      Default register value for R48 (Additional Control 4).
59      If absent, the default should be the register default.
60
61  gpio-cfg:
62    $ref: /schemas/types.yaml#/definitions/uint32-array
63    minItems: 6
64    maxItems: 6
65    description:
66      A list of GPIO configuration register values.  If absent, no
67      configuration of these registers is performed.  Note that only values
68      within [0x0, 0xffff] are valid.  Any other value is regarded as setting
69      the GPIO register to its reset value 0x0.
70
71  port:
72    $ref: audio-graph-port.yaml#
73    unevaluatedProperties: false
74
75required:
76  - compatible
77  - reg
78  - AVDD-supply
79  - CPVDD-supply
80  - DBVDD-supply
81  - DCVDD-supply
82  - MICVDD-supply
83  - PLLVDD-supply
84  - SPKVDD1-supply
85  - SPKVDD2-supply
86
87additionalProperties: false
88
89examples:
90  - |
91    #include <dt-bindings/clock/imx6qdl-clock.h>
92
93    i2c {
94          #address-cells = <1>;
95          #size-cells = <0>;
96
97          wm8962: codec@1a {
98                  compatible = "wlf,wm8962";
99                  reg = <0x1a>;
100                  clocks = <&clks IMX6QDL_CLK_CKO>;
101                  DCVDD-supply = <&reg_audio>;
102                  DBVDD-supply = <&reg_audio>;
103                  AVDD-supply = <&reg_audio>;
104                  CPVDD-supply = <&reg_audio>;
105                  MICVDD-supply = <&reg_audio>;
106                  PLLVDD-supply = <&reg_audio>;
107                  SPKVDD1-supply = <&reg_audio>;
108                  SPKVDD2-supply = <&reg_audio>;
109                  gpio-cfg = <
110                          0x0000 /* 0:Default */
111                          0x0000 /* 1:Default */
112                          0x0013 /* 2:FN_DMICCLK */
113                          0x0000 /* 3:Default */
114                          0x8014 /* 4:FN_DMICCDAT */
115                          0x0000 /* 5:Default */
116                  >;
117          };
118    };
119