1a731e217SRongjun Ying* SiRF SoC audio port
2a731e217SRongjun Ying
3a731e217SRongjun YingRequired properties:
4a731e217SRongjun Ying- compatible: "sirf,audio-port"
5a731e217SRongjun Ying- reg: Base address and size entries:
6a731e217SRongjun Ying- dmas: List of DMA controller phandle and DMA request line ordered pairs.
7a731e217SRongjun Ying- dma-names: Identifier string for each DMA request line in the dmas property.
8a731e217SRongjun Ying  These strings correspond 1:1 with the ordered pairs in dmas.
9a731e217SRongjun Ying
10a731e217SRongjun Ying  One of the DMA channels will be responsible for transmission (should be
11a731e217SRongjun Ying  named "tx") and one for reception (should be named "rx").
12a731e217SRongjun Ying
13a731e217SRongjun YingExample:
14a731e217SRongjun Ying
15a731e217SRongjun Yingaudioport: audioport@b0040000 {
16a731e217SRongjun Ying	compatible = "sirf,audio-port";
17a731e217SRongjun Ying	reg = <0xb0040000 0x10000>;
18a731e217SRongjun Ying	dmas = <&dmac1 3>, <&dmac1 8>;
19a731e217SRongjun Ying	dma-names = "rx", "tx";
20a731e217SRongjun Ying};
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