1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung SoC I2S controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 13allOf: 14 - $ref: dai-common.yaml# 15 16properties: 17 compatible: 18 description: | 19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. 20 21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with 22 secondary FIFO, s/w reset control and internal mux for root clock 23 source. 24 25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for 26 playback, stereo channel capture, secondary FIFO using internal 27 or external DMA, s/w reset control, internal mux for root clock 28 source and 7.1 channel TDM support for playback; TDM (Time division 29 multiplexing) is to allow transfer of multiple channel audio data on 30 single data line. 31 32 samsung,exynos7-i2s: with all the available features of Exynos5 I2S. 33 Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO 34 with only external DMA and more number of root clock sampling 35 frequencies. 36 37 samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports 38 stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with 39 slightly modified bit offsets. 40 enum: 41 - samsung,s3c6410-i2s 42 - samsung,s5pv210-i2s 43 - samsung,exynos5420-i2s 44 - samsung,exynos7-i2s 45 - samsung,exynos7-i2s1 46 47 '#address-cells': 48 const: 1 49 50 '#size-cells': 51 const: 0 52 53 reg: 54 maxItems: 1 55 56 dmas: 57 minItems: 2 58 maxItems: 3 59 60 dma-names: 61 oneOf: 62 - items: 63 - const: tx 64 - const: rx 65 - items: 66 - const: tx 67 - const: rx 68 - const: tx-sec 69 70 assigned-clock-parents: true 71 assigned-clocks: true 72 73 clocks: 74 minItems: 1 75 maxItems: 3 76 77 clock-names: 78 oneOf: 79 - items: 80 - const: iis 81 - items: # for I2S0 82 - const: iis 83 - const: i2s_opclk0 84 - const: i2s_opclk1 85 - items: # for I2S1 and I2S2 86 - const: iis 87 - const: i2s_opclk0 88 description: | 89 "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources 90 of the root clock. I2S0 has internal mux to select the source 91 of root clock and I2S1 and I2S2 doesn't have any such mux. 92 93 "#clock-cells": 94 const: 1 95 96 clock-output-names: 97 deprecated: true 98 oneOf: 99 - items: # for I2S0 100 - const: i2s_cdclk0 101 - items: # for I2S1 102 - const: i2s_cdclk1 103 - items: # for I2S2 104 - const: i2s_cdclk2 105 description: Names of the CDCLK I2S output clocks. 106 107 interrupts: 108 maxItems: 1 109 110 samsung,idma-addr: 111 $ref: /schemas/types.yaml#/definitions/uint32 112 description: | 113 Internal DMA register base address of the audio 114 subsystem (used in secondary sound source). 115 116 power-domains: 117 maxItems: 1 118 119 "#sound-dai-cells": 120 const: 1 121 122required: 123 - compatible 124 - reg 125 - dmas 126 - dma-names 127 - clocks 128 - clock-names 129 130unevaluatedProperties: false 131 132examples: 133 - | 134 #include <dt-bindings/clock/exynos-audss-clk.h> 135 136 i2s0: i2s@3830000 { 137 compatible = "samsung,s5pv210-i2s"; 138 reg = <0x03830000 0x100>; 139 dmas = <&pdma0 10>, 140 <&pdma0 9>, 141 <&pdma0 8>; 142 dma-names = "tx", "rx", "tx-sec"; 143 clocks = <&clock_audss EXYNOS_I2S_BUS>, 144 <&clock_audss EXYNOS_I2S_BUS>, 145 <&clock_audss EXYNOS_SCLK_I2S>; 146 clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; 147 #clock-cells = <1>; 148 samsung,idma-addr = <0x03000000>; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&i2s0_bus>; 151 #sound-dai-cells = <1>; 152 }; 153