1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung SoC I2S controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11  - Sylwester Nawrocki <s.nawrocki@samsung.com>
12
13properties:
14  compatible:
15    description: |
16      samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
17
18      samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
19      secondary FIFO, s/w reset control and internal mux for root clock
20      source.
21
22      samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
23      playback, stereo channel capture, secondary FIFO using internal
24      or external DMA, s/w reset control, internal mux for root clock
25      source and 7.1 channel TDM support for playback; TDM (Time division
26      multiplexing) is to allow transfer of multiple channel audio data on
27      single data line.
28
29      samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
30      Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
31      with only external DMA and more number of root clock sampling
32      frequencies.
33
34      samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
35      stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with
36      slightly modified bit offsets.
37    enum:
38      - samsung,s3c6410-i2s
39      - samsung,s5pv210-i2s
40      - samsung,exynos5420-i2s
41      - samsung,exynos7-i2s
42      - samsung,exynos7-i2s1
43
44  reg:
45    maxItems: 1
46
47  dmas:
48    minItems: 2
49    maxItems: 3
50
51  dma-names:
52    oneOf:
53      - items:
54          - const: tx
55          - const: rx
56      - items:
57          - const: tx
58          - const: rx
59          - const: tx-sec
60
61  clocks:
62    minItems: 1
63    maxItems: 3
64
65  clock-names:
66    oneOf:
67      - items:
68          - const: iis
69      - items: # for I2S0
70          - const: iis
71          - const: i2s_opclk0
72          - const: i2s_opclk1
73      - items: # for I2S1 and I2S2
74          - const: iis
75          - const: i2s_opclk0
76    description: |
77      "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources
78      of the root clock. I2S0 has internal mux to select the source
79      of root clock and I2S1 and I2S2 doesn't have any such mux.
80
81  "#clock-cells":
82    const: 1
83
84  clock-output-names:
85    deprecated: true
86    oneOf:
87      - items: # for I2S0
88          - const: i2s_cdclk0
89      - items: # for I2S1
90          - const: i2s_cdclk1
91      - items: # for I2S2
92          - const: i2s_cdclk2
93    description: Names of the CDCLK I2S output clocks.
94
95  samsung,idma-addr:
96    $ref: /schemas/types.yaml#/definitions/uint32
97    description: |
98      Internal DMA register base address of the audio
99      subsystem (used in secondary sound source).
100
101  pinctrl-0:
102    description: Should specify pin control groups used for this controller.
103
104  pinctrl-names:
105    const: default
106
107  "#sound-dai-cells":
108    const: 1
109
110required:
111  - compatible
112  - reg
113  - dmas
114  - dma-names
115  - clocks
116  - clock-names
117
118examples:
119  - |
120    #include <dt-bindings/clock/exynos-audss-clk.h>
121
122    i2s0: i2s@3830000 {
123        compatible = "samsung,s5pv210-i2s";
124        reg = <0x03830000 0x100>;
125        dmas = <&pdma0 10>,
126                <&pdma0 9>,
127                <&pdma0 8>;
128        dma-names = "tx", "rx", "tx-sec";
129        clocks = <&clock_audss EXYNOS_I2S_BUS>,
130                <&clock_audss EXYNOS_I2S_BUS>,
131                <&clock_audss EXYNOS_SCLK_I2S>;
132        clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
133        #clock-cells = <1>;
134        samsung,idma-addr = <0x03000000>;
135        pinctrl-names = "default";
136        pinctrl-0 = <&i2s0_bus>;
137        #sound-dai-cells = <1>;
138    };
139