14a6180eaSOder ChiouRT5514 audio CODEC 24a6180eaSOder Chiou 3d6604145SJeffy ChenThis device supports both I2C and SPI. 44a6180eaSOder Chiou 54a6180eaSOder ChiouRequired properties: 64a6180eaSOder Chiou 74a6180eaSOder Chiou- compatible : "realtek,rt5514". 84a6180eaSOder Chiou 9d6604145SJeffy Chen- reg : the I2C address of the device for I2C, the chip select 10d6604145SJeffy Chen number for SPI. 114a6180eaSOder Chiou 12c9506bb8SOder ChiouOptional properties: 13c9506bb8SOder Chiou 14c9506bb8SOder Chiou- clocks: The phandle of the master clock to the CODEC 15c9506bb8SOder Chiou- clock-names: Should be "mclk" 16c9506bb8SOder Chiou 17d6604145SJeffy Chen- interrupt-parent: The phandle for the interrupt controller. 18d6604145SJeffy Chen- interrupts: The interrupt number to the cpu. The interrupt specifier format 19d6604145SJeffy Chen depends on the interrupt controller. 20a5461fd6SOder Chiou 21d6604145SJeffy Chen- realtek,dmic-init-delay-ms 22d6604145SJeffy Chen Set the DMIC initial delay (ms) to wait it ready for I2C. 23d6604145SJeffy Chen 24d6604145SJeffy ChenPins on the device (for linking into audio routes) for I2C: 254a6180eaSOder Chiou 264a6180eaSOder Chiou * DMIC1L 274a6180eaSOder Chiou * DMIC1R 284a6180eaSOder Chiou * DMIC2L 294a6180eaSOder Chiou * DMIC2R 304a6180eaSOder Chiou * AMICL 314a6180eaSOder Chiou * AMICR 324a6180eaSOder Chiou 334a6180eaSOder ChiouExample: 344a6180eaSOder Chiou 354a6180eaSOder Chioucodec: rt5514@57 { 364a6180eaSOder Chiou compatible = "realtek,rt5514"; 374a6180eaSOder Chiou reg = <0x57>; 384a6180eaSOder Chiou}; 39