1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPDIF transceiver
8
9description:
10  The S/PDIF audio block is a stereo transceiver that allows the
11  processor to receive and transmit digital audio via a coaxial or
12  fibre cable.
13
14maintainers:
15  - Heiko Stuebner <heiko@sntech.de>
16
17properties:
18  compatible:
19    oneOf:
20      - const: rockchip,rk3066-spdif
21      - const: rockchip,rk3228-spdif
22      - const: rockchip,rk3328-spdif
23      - const: rockchip,rk3366-spdif
24      - const: rockchip,rk3368-spdif
25      - const: rockchip,rk3399-spdif
26      - items:
27          - enum:
28            - rockchip,rk3188-spdif
29            - rockchip,rk3288-spdif
30          - const: rockchip,rk3066-spdif
31
32  reg:
33    maxItems: 1
34
35  interrupts:
36    maxItems: 1
37
38  clocks:
39    items:
40      - description: clock for SPDIF bus
41      - description: clock for SPDIF controller
42
43  clock-names:
44    items:
45      - const: mclk
46      - const: hclk
47
48  dmas:
49    maxItems: 1
50
51  dma-names:
52    const: tx
53
54  rockchip,grf:
55    $ref: /schemas/types.yaml#/definitions/phandle
56    description:
57      The phandle of the syscon node for the GRF register.
58      Required property on RK3288.
59
60required:
61  - compatible
62  - reg
63  - interrupts
64  - clocks
65  - clock-names
66  - dmas
67  - dma-names
68
69if:
70  properties:
71    compatible:
72      contains:
73        const: rockchip,rk3288-spdif
74
75then:
76  required:
77    - rockchip,grf
78
79additionalProperties: false
80
81examples:
82  - |
83    #include <dt-bindings/clock/rk3188-cru.h>
84    #include <dt-bindings/interrupt-controller/arm-gic.h>
85    spdif: spdif@1011e000 {
86      compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
87      reg = <0x1011e000 0x2000>;
88      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
89      clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
90      clock-names = "mclk", "hclk";
91      dmas = <&dmac1_s 8>;
92      dma-names = "tx";
93    };
94