1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPDIF transceiver
8
9description:
10  The S/PDIF audio block is a stereo transceiver that allows the
11  processor to receive and transmit digital audio via a coaxial or
12  fibre cable.
13
14maintainers:
15  - Heiko Stuebner <heiko@sntech.de>
16
17properties:
18  compatible:
19    oneOf:
20      - const: rockchip,rk3066-spdif
21      - const: rockchip,rk3228-spdif
22      - const: rockchip,rk3328-spdif
23      - const: rockchip,rk3366-spdif
24      - const: rockchip,rk3368-spdif
25      - const: rockchip,rk3399-spdif
26      - items:
27          - enum:
28              - rockchip,rk3188-spdif
29              - rockchip,rk3288-spdif
30              - rockchip,rk3308-spdif
31          - const: rockchip,rk3066-spdif
32
33  reg:
34    maxItems: 1
35
36  interrupts:
37    maxItems: 1
38
39  clocks:
40    items:
41      - description: clock for SPDIF bus
42      - description: clock for SPDIF controller
43
44  clock-names:
45    items:
46      - const: mclk
47      - const: hclk
48
49  dmas:
50    maxItems: 1
51
52  dma-names:
53    const: tx
54
55  power-domains:
56    maxItems: 1
57
58  rockchip,grf:
59    $ref: /schemas/types.yaml#/definitions/phandle
60    description:
61      The phandle of the syscon node for the GRF register.
62      Required property on RK3288.
63
64  "#sound-dai-cells":
65    const: 0
66
67required:
68  - compatible
69  - reg
70  - interrupts
71  - clocks
72  - clock-names
73  - dmas
74  - dma-names
75  - "#sound-dai-cells"
76
77if:
78  properties:
79    compatible:
80      contains:
81        const: rockchip,rk3288-spdif
82
83then:
84  required:
85    - rockchip,grf
86
87additionalProperties: false
88
89examples:
90  - |
91    #include <dt-bindings/clock/rk3188-cru.h>
92    #include <dt-bindings/interrupt-controller/arm-gic.h>
93    spdif: spdif@1011e000 {
94      compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
95      reg = <0x1011e000 0x2000>;
96      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
97      clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
98      clock-names = "mclk", "hclk";
99      dmas = <&dmac1_s 8>;
100      dma-names = "tx";
101      #sound-dai-cells = <0>;
102    };
103