1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip I2S controller
8
9description:
10  The I2S bus (Inter-IC sound bus) is a serial link for digital
11  audio data transfer between devices in the system.
12
13maintainers:
14  - Heiko Stuebner <heiko@sntech.de>
15
16allOf:
17  - $ref: dai-common.yaml#
18
19properties:
20  compatible:
21    oneOf:
22      - const: rockchip,rk3066-i2s
23      - items:
24          - enum:
25              - rockchip,px30-i2s
26              - rockchip,rk1808-i2s
27              - rockchip,rk3036-i2s
28              - rockchip,rk3128-i2s
29              - rockchip,rk3188-i2s
30              - rockchip,rk3228-i2s
31              - rockchip,rk3288-i2s
32              - rockchip,rk3308-i2s
33              - rockchip,rk3328-i2s
34              - rockchip,rk3366-i2s
35              - rockchip,rk3368-i2s
36              - rockchip,rk3399-i2s
37              - rockchip,rv1126-i2s
38          - const: rockchip,rk3066-i2s
39
40  reg:
41    maxItems: 1
42
43  interrupts:
44    maxItems: 1
45
46  clocks:
47    items:
48      - description: clock for I2S controller
49      - description: clock for I2S BUS
50
51  clock-names:
52    items:
53      - const: i2s_clk
54      - const: i2s_hclk
55
56  dmas:
57    minItems: 1
58    maxItems: 2
59
60  dma-names:
61    oneOf:
62      - const: rx
63      - items:
64          - const: tx
65          - const: rx
66
67  pinctrl-names:
68    oneOf:
69      - const: default
70      - items:
71          - const: bclk_on
72          - const: bclk_off
73
74  power-domains:
75    maxItems: 1
76
77  reset-names:
78    items:
79      - const: reset-m
80      - const: reset-h
81
82  resets:
83    maxItems: 2
84
85  port:
86    $ref: audio-graph-port.yaml#
87    unevaluatedProperties: false
88
89  rockchip,capture-channels:
90    $ref: /schemas/types.yaml#/definitions/uint32
91    default: 2
92    description:
93      Max capture channels, if not set, 2 channels default.
94
95  rockchip,playback-channels:
96    $ref: /schemas/types.yaml#/definitions/uint32
97    default: 8
98    description:
99      Max playback channels, if not set, 8 channels default.
100
101  rockchip,grf:
102    $ref: /schemas/types.yaml#/definitions/phandle
103    description:
104      The phandle of the syscon node for the GRF register.
105      Required property for controllers which support multi channel
106      playback/capture.
107
108  "#sound-dai-cells":
109    const: 0
110
111required:
112  - compatible
113  - reg
114  - interrupts
115  - clocks
116  - clock-names
117  - dmas
118  - dma-names
119  - "#sound-dai-cells"
120
121unevaluatedProperties: false
122
123examples:
124  - |
125    #include <dt-bindings/clock/rk3288-cru.h>
126    #include <dt-bindings/interrupt-controller/arm-gic.h>
127    #include <dt-bindings/interrupt-controller/irq.h>
128    i2s@ff890000 {
129      compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
130      reg = <0xff890000 0x10000>;
131      interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
132      clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
133      clock-names = "i2s_clk", "i2s_hclk";
134      dmas = <&pdma1 0>, <&pdma1 1>;
135      dma-names = "tx", "rx";
136      rockchip,capture-channels = <2>;
137      rockchip,playback-channels = <8>;
138      #sound-dai-cells = <0>;
139    };
140